Claims
- 1. A method of making a semiconductor structure with at least two semiconductor layers with differing lattice constants forming a bilayer comprising the steps of:
- providing a first structure including a first crystalline semiconductor layer of insufficient thickness to prevent curling of the bilayer due to strain between the layers thereof;
- disposing said first crystalline semiconductor on a first support layer with an interface therebetween that allows slippage between said support layer and said first crystalline layer;
- providing on said first crystalline layer, a second crystalline semiconductor layer to form the bilayer, said second crystalline semiconductor layer having a lattice constant different than that of said first crystalline semiconductor layer and being substantially thicker than the first crystalline semiconductor layer to transfer strain from the second crystalline semiconductor layer to the first crystalline semiconductor layer; and
- permitting stress relief in said first crystalline layer and said second semiconductor layer as a result of at least one of flow of said support layer and slippage at said interface.
- 2. The method of claim 1, wherein said first crystalline layer is comprised of a semiconductor other than that of said semiconductor layer.
- 3. The method of claim 1 wherein said first structure further comprises an additional layer for supporting said first support layer.
- 4. A method of making a semiconductor structure having at least two semiconductor layers with different lattice constants forming a bilayer comprising the steps of:
- providing a semiconductor base layer;
- forming a second layer of material on said semiconductor base layer;
- forming a silicon layer as one of the layers of the bilayer on said second layer, said silicon layer having a thickness in and of itself insufficient to prevent curling of the bilayer due to strain without the support of the second layer;
- growing a second semiconductor layer of different lattice constant from said silicon layer pesudomorphically on said silicon layer to form the bilayer, said second semiconductor layer being thinner than the metasable critical thickness but substantially thicker than the silicon layer to transfer strain from the second semiconductor layer to the silicon layer in accordance with the equation: Be.sub.1.sup.2 .multidot.h=Be.sub.1.sup.2 .multidot.h.sub.2 where: B+2G(1+h)/(1-h); G=shear modulus; n=Poisson's modulus; e=mismatch; and h=layer thickness; and
- annealing of all said layers together to form a layered structure with a surface having a lattice constant other than that of silicon and providing stress relief at an interface between the second and the silicon layers.
- 5. A method of making a semiconductor structure having at least two semiconductor layers with different lattice constants forming a bilayer comprising the steps of:
- providing a semiconductor base comprising a silicon layer as one of the layers of the bilayer which layer is insufficiently thick in and or itself to prevent curling of the bilayer;
- placing the silicon layer on an insulator of different lattice constant from that of silicon to support the silicon layer;
- growing a second semiconductor layer of different lattice constant from said silicon layer pseudomorphically on said silicon layer to a thickness sufficiently thicker than the silicon layer to relieve substantially all the strain from the second semiconductor layer; and
- annealing all of said layers together to form a layered structure with a surface having a lattice constant other than that of silicon and providing stress relief at the interface between the second layer and the silicon layer.
- 6. A method of making a semiconductor structure comprising having at least two semiconductor layers with different lattice constants forming a bilayer the steps of:
- providing a semiconductor base comprising a silicon layer as one layer of the bilayer which silicon layer has insufficient thickness to in and of itself prevent curling of the bilayer;
- placing the silicon layer on an insulator of different lattice constant from that of the silicon layer to form an interface therebetween that permits slippage; and
- growing a SiGe semiconductor layer of different lattice constant from said silicon layer at high temperature on said silicon layer to a thickness sufficiently thicker than the silicon layer to relieve substantially all the strain from the SiGe layer and provide stress relief at said interface to form a layered structure with a surface having a lattice constant other than that of silicon.
- 7. A method as in claim 4 wherein said grown semiconductor comprises Si.sub.1-x Ge.sub.x where 0<x<1.
- 8. A method as in one of claim 4 wherein said amorphous material is selected from the group consisting of oxides, nitrides, and carbides.
- 9. A method as in claim 5 or 6 wherein said insulator is sapphire.
- 10. A method as in one of claim 4 further comprising the step of growing a tensilely-strained semiconductor layer on said surface.
- 11. A method as in claim 10 wherein said tensilely-strained semiconductor is silicon.
- 12. The method of claim 7 wherein said silicon layer is between 2 nm and 500 nm thick.
- 13. The method of claim 7 wherein x is approximately 0.15 and the silicon layer is approximately 50 nm thick.
- 14. The method of claim 7 including the step of selecting the thickness of the silicon layer based on the percentage of Ge in the Si.sub.1-x Ge.sub.x layer.
- 15. The method of claim 7 providing a Si.sub.1-x Ge.sub.x layer which is at least twice as thick as the silicon layer.
- 16. The method of claim 7 wherein the annealing step is performed at a temperature sufficiently high to diffuse the germanium in the Si.sub.x-1 layer of the bilayer to form a single Si.sub.y-1 Ge.sub.y layer where x>y.
Parent Case Info
This is a continuation of application Ser. No. 08/501,894, filed Jul. 13, 1995 now abandoned, which is a. division of application Ser. No. 08/145,986, filed Oct. 29, 1993 now U.S. Pat. No. 5,461,243.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
4857270 |
Maruga et al. |
Aug 1989 |
|
Foreign Referenced Citations (1)
Number |
Date |
Country |
2066847 |
Oct 1992 |
CAX |
Non-Patent Literature Citations (1)
Entry |
Kesan et al. "Si/SiGe Heterostructures Grown on SOI Substrates by MBE for Integrated Optoelectronics," Journal Crystal Growth, vol. 111 No. 1-4 (1991) pp. 936-942. |
Divisions (1)
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Number |
Date |
Country |
Parent |
145986 |
Oct 1993 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
501894 |
Jul 1995 |
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