Claims
- 1. A method of changing the bandgap energy in an Indium Gallium Arsenide Phosphide (InGaAsP) semiconductor quantum well structure, wherein the composition fraction for each of Indium, Gallium, Arsenide and Phosphide ranges from zero to one, such that the sum of the Ga and In fractions is one as is the sum of the P and As fractions, the method comprising:
(a) providing a quantum well structure comprising an Indium Gallium Arsenide Phosphide (InGaAsP) quantum well active region; (b) on top of the quantum well structure, providing a low temperature grown Indium Phosphide (LT-InP) cap layer; and (c) applying a Rapid Thermal Annealing (RTA) process for controlled diffusion of defects in said low temperature grown Indium Phosphide cap layer, wherein said defects diffuse to the quantum well region.
- 2. The method of claim 1, wherein the LT-InP layer is undoped.
- 3. The method of claim 1, wherein the LT-InP layer is doped p-type.
- 4. The method of claim 1, wherein the LT-InP layer is grown at a temperature not above 300° C.
- 5. The method of claim 4, wherein the LT-InP layer is grown at a temperature not above 285° C.
- 6. The method of claim 5, wherein the LT-InP layer is grown at a temperature not above 270° C.
- 7. The method of claim 4, wherein the LT-InP layer is grown using a phosphine flow.
- 8. The method of claim 7, wherein the phosphine flow is at a rate of at least 2.14 sccm.
- 9. The method of claim 8, wherein the rate of the phosphine flow is at least 3.0 sccm.
- 10. The method of claim 9, wherein the rate of the phosphine flow is at least 4.015 sccm.
- 11. The method of claim 10, wherein the rate of the phosphine flow is at least 5.75 sccm.
- 12. The method of claim 1, wherein an InP cladding layer is formed between the quantum well active region and the LT-InP cap layer, and wherein a thickness of the InP cladding layer is no more than 100 nm.
- 13. The method of claim 1, wherein, during step (c), the cap layer is an uppermost layer of the quantum well structure.
- 14. The method of claim 1, wherein the RTA process is performed at a temperature below 750° C.
REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a continuation-in-part of U.S. patent application Ser. No. 09/833,078, filed Apr. 12, 2001, published on Mar. 14, 2002, as U.S. Pat. No. 2002/0030185 A1, now pending, which claims the benefit of U.S. Provisional Application No. 60/205,261, filed May 19, 2000. The disclosures of both of the above-referenced applications are hereby incorporated by reference in their entireties into the present application.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60205261 |
May 2000 |
US |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
09833078 |
Apr 2001 |
US |
Child |
10264316 |
Oct 2002 |
US |