This application claims the priority benefit of Japan application serial no. 2019-108325, filed on Jun. 11, 2019. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
The disclosure relates to an electronic circuit and a measuring circuit, and more particularly, to a ring oscillator and a time measuring circuit.
Generally, fast access to the memory cell is important in a DRAM design. Therefore, the sensing time t1 to t2 should be as short as possible to enable fast access to the memory cell. However, the sensing time t1 to t2 cannot be overly short, because the longer sensing time t1 to t2 can allow the sensing circuit 120 to sense a larger bit line voltage difference to ensure the correctness of data determination. Therefore, if the time length of the sensing time t1 to t2 can be measured, it will contribute to improvement of the process evaluation and circuit design.
The invention provides a ring oscillator and a time measuring circuit, which can accurately measure the sensing time of a memory cell.
A ring oscillator of the invention includes a plurality of flip-flops. The flip-flops are connected in a ring. The flip-flops are configured to start to oscillate according to a start signal to generate an output signal, and stop oscillating according to a stop signal to stop generating the output signal. When the stop signal changes from a first level to a second level, the output signal becomes floating.
A time measuring circuit of the invention includes a ring oscillator and a counter circuit. The ring oscillator is configured to start to oscillate according to a start signal to generate an output signal, and stop oscillating according to a stop signal to stop generating the output signal. When the stop signal changes from a first level to a second level, the output signal becomes floating. The counter circuit is coupled to the ring oscillator. The counter circuit is configured to receive and count the output signal to generate a count value as a time measurement result.
Based on the above, in the embodiments of the invention, when the stop signal changes from the first level to the second level, the output signal of the ring oscillator becomes floating and can latch the ring oscillator in the correct condition. Therefore, the time measuring circuit can accurately measure the sensing time of the memory cell.
To make the aforementioned more comprehensible, several embodiments accompanied with drawings are described in detail as follows.
In the present embodiment, the time measuring circuit 200 is adapted, for example, to measure the sensing time t1 to t2 of
In the present embodiment, the input terminal of each flip-flop is coupled to the first output terminal of the previous-stage flip-flop, and the first output terminal of each flip-flop is coupled to the input terminal of the next-stage flip-flop. For example, the input terminal A of the flip-flop 212_0 is coupled to the first output terminal Y of the previous-stage flip-flop 212_4, and the first output terminal Y of the flip-flop 212_0 is coupled to the input terminal A of the next-stage flip-flop 212_1. The first output terminal of each flip-flop outputs an internal signal, and the second output terminal of each flip-flop outputs a data signal. For example, the first output terminals Y of the flip-flops 212_0, 212_1, 212_2, 212_3, and 212_4 respectively output internal signals nr1, nr2, nr3, nr4, and nr0, and the second output terminals Q of the flip-flops 212_0, 212_1, 212_2, 212_3, and 212_4 respectively output data signals q<0>, q<1>, q<2>, q<3>, and q<4>. In the present embodiment, the internal signal nr0 output by the last-stage flip-flop is used as the output signal S3. Namely, the internal signal nr0 output by the flip-flop 212_4 is used as the output signal S3.
In
In the related art, since the internal signal of the ring oscillator is reset after receiving the stop signal, the ring oscillator cannot be suspended immediately. As a result, the time measuring circuit cannot accurately measure the sensing time of the memory cell. In the present embodiment, when the stop signal changes from the first level to the second level, the output signal of the ring oscillator becomes floating and can remain at the high level to latch the ring oscillator in the correct condition. Therefore, the time measuring circuit can accurately measure the sensing time of the memory cell.
In summary of the above, in the embodiments of the invention, when the stop signal changes from the first level to the second level, the output signal of the ring oscillator becomes floating and can remain at the high level to latch the ring oscillator in the correct condition. Therefore, the time measuring circuit can accurately measure the sensing time of the memory cell.
It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the disclosure covers modifications and variations provided that they fall within the scope of the following claims and their equivalents.
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JP2019-108325 | Jun 2019 | JP | national |
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Number | Date | Country | |
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20200395922 A1 | Dec 2020 | US |