The present technology is directed to semiconductor device packaging. More particularly, some embodiments of the present technology relate to techniques for creating smooth structures in situ using grayscale photolithography.
Semiconductor dies, including memory chips, microprocessor chips, logic chips and imager chips, that are used in flexible devices have interconnects that can crack or break, resulting in failure. Also, some devices that require high precision and smooth surfaces currently need to be fabricated separately and then assembled into semiconductor device assemblies.
Many aspects of the present technology can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale. Instead, emphasis is placed on illustrating the principles of the present technology.
During a grayscale photolithography process, a structure can be formed of a photo-responsive and curable material, such as photoresist or a dielectric-like polyimide. The structure can be permanent if made with a product such as polyimide, or temporary if formed with photoresist. The curing process generally includes three consecutive time periods during which the temperature is adjusted to predetermined parameters, such as a ramp-up period, a dwell period, and a ramp-down period, discussed in detail further below in
In some embodiments, the temperature ramping rate during the ramp-up period is set to allow the photo-responsive material to soften prior to cross-linking, thus refining slopes and edges in the surface of the material. Using a lower/slower ramp rate than was used in previous applications allows the photo-responsive material to cross-flow before it is set or cross-linked. The cross-flow of the photo-responsive material softens or diminishes the “stair-step” or sawtooth topology created by the grayscale photolithography process, resulting in an exposed outer surface of the photo-responsive material that has a smoother gradient while utilizing a single photo exposure process. In some embodiments, a subsequent structure can be placed or built upon the photo-responsive material. In some cases, the material that formed the initial photo-responsive structure, such as photoresist, can be removed after a subsequent structure is plated, positioned, or built on it, while in other embodiments, the photo-responsive structure can remain in the semiconductor device assembly. Various benefits of providing smoothed 3-dimensional topographies at semiconductor lithographic scales may include improved reflective and/or refractive performance, finer control over movement of micro electro-mechanical system (MEMS), higher-performing inductive and/or capacitive structures, etc.
A further advantage of some embodiments is the ability to fabricate or form smoothed shapes in situ in the semiconductor device assembly. For example, many smoothed surfaces can be formed, such as, but not limited to, sloped, coiled, spiral, helical, half-helical, concave, convex, etc. The smoothed formed structures can thus include MEMS structures, micro-lenses, micro-lens arrays, optical fibers, and probe cards with, for example, cantilevered pins. Devices that are formed with the advantageously smoothed surfaces can achieve improved performance, such as improved electrical performance, optical performance, etc. Where the shape of a structure is used to encode data (e.g., as in optical data storage devices), improved process control of surface smoothing can enable higher areal density of data or even pseudo-analog encoding.
Numerous specific details are disclosed herein to provide a thorough and enabling description of embodiments of the present technology. A person skilled in the art, however, will understand that the technology may have additional embodiments and that the technology may be practiced without several of the details of the embodiments described below with reference to
As used herein, the terms “vertical,” “lateral,” “upper,” “lower,” “above,” and “below”, “top”, and “bottom” can refer to relative directions or positions of features in the semiconductor devices in view of the orientation shown in the Figures. For example, “upper”, “uppermost”, or “top” can refer to a feature positioned closer to the top of a page than another feature. These terms, however, should be construed broadly to include semiconductor devices having other orientations, such as inverted or inclined orientations where top/bottom, over/under, above/below, up/down, and left/right can be interchanged depending on the orientation. Also, as used herein, features that are, can, or may be substantially equal are within 10% of each other, or within 5% of each other, or within 2% of each other, or within 1% of each other, or within 0.5% of each other, or within 0.1% of each other, according to various embodiments of the disclosure.
The area around the structure 102 can be filled with dielectric material 108 to encase exposed portions of the structure 102. For example, the dielectric material 108 can flow under the structure 102 to fill open areas between the structure 102 and the metal pad 104 and/or substrate 106. The top of the structure 102 can be opened up (such as by grinding, etching, etc.) if needed to form an upper pad 110 for electrical connection to another device or interconnect, as shown in
The structure 102 is shown with three different fills to indicate different depths. Portion 112 is attached to or closest to the substrate 106, portion 114 is further from the substrate 106, while portion 116 continues to the surface of the dielectric material 108. This representation is used for ease of illustration only. Although the structure 102 is shown as generally rectilinear, the shape of the structure 102 can instead be curved, such as a smooth coil or spiral-shape with smoothed gradients along its surface that curves from the metal pad 104 to the top portion 116 or top surface of the dielectric material 108. The smooth coil of 3D structure 102 would therefore not have large gradients as shown. The structure 102 can be other 3D shapes, such as helical or circular, convex or concave, ramped, or other shapes as discussed further below. In some embodiments, the structure 102 can be used as a conductive spring-like structure that allows for a slight flex of the structure 102 to improve the connection, thus providing an advantage by preventing the interconnect from cracking when the assembly 100 is used within devices that move or flex.
If a positive-tone photo-responsive material is used, a greater level of light exposure results in a greater removal of material. In some cases, full exposure to light can result in full removal of the photo-responsive material. In contrast, if a negative-tone photo-responsive material is used, exposure to a greater level of light results in removing less of the material.
The gradient mask 200 in
An initial structure formed of the photo-responsive material using the gradient mask 200 can be shaped as a partial spiral or helical structure that has a sloped or ramped outer surface. The upper or outer surface can be rough with many stair-steps that result from the varying opaqueness of the gradient mask 200. In some embodiments, a smoother gradient along the surface of the initial structure is desired, and can be accomplished with a smoothing profile during the material curing process as discussed below in
A soft bake process can be accomplished to “set” the photo-responsive material on the substrate 106 (block 306). The soft bake process is generally a low temperature, low time process that can prevent the slide or migration of the photo-responsive material prior to light exposure. The gradient mask 200 is positioned between a light source and the photo-responsive material, such as with a mask aligner (block 308). In some embodiments, as discussed in
Unwanted photo-responsive material can be removed during a development process (block 312), such as but not limited to, with a solvent. In some embodiments, as discussed previously with respect to
Turning to
Standard profile 400 is the same in both
Referring to smoothing profile 418a of
The first time period 420a (e.g., ramp-up period) of the smoothing profile 418a is longer than the first time period 402 of the standard profile 400. The first time period 420a spends a greater amount of time below the dwell temperature 414 to allow the polyimide material to soften (e.g., melt) and cross-flow before the polyimide material is set or cross-linked during the second time period 422a. The cross-flow of the polyimide material softens the gradients or edges (e.g., corners of the stair-step) that are created in the outer surface of the polyimide material as a result of using the gradient mask 200, resulting in a smoother, more linear, outer surface. In general, a slower ramping rate (e.g., ramping at less degrees per minute) results in more smoothing of the polyimide material while faster ramping, as shown by the standard profile 400 wherein the temperature rises at a relatively greater number of degrees per minute, “sets” the smoothed surface 212 of the polyimide material with the stair-steps and ridges as it was created by the gradient mask 200. Therefore, processing using the standard profile 400 results in larger gradients on a surface of the polyimide material compared to the smoothed surface 212 that results from the smoothing profile 418a.
In some embodiments, the first time period 420a of the smoothing profile 418a can exceed one hour, such as approximately 70 minutes, 80 minutes, 90 minutes, or even more, while the first time period 402 of the standard profile 400 is less than one hour, such as approximately 40 minutes. In other embodiments the first time period 402 of the standard profile 400 can be accomplished in approximately half the time of that of the first time period 420a of the smoothing profile 418a. Relatedly, the temperature of the smoothing profile 418a rises as a slower rate than the standard profile 400, such as at approximately two degrees per minute slower than the standard profile 400. The smoothing profile 418a can rise at a relatively constant rate between the starting temperature 412 and the dwell temperature 414 as shown in
Optionally, there may be one or more additional dwell time period, indicated as fourth time period 426 on
Although not shown, in other embodiments there can be two or more (e.g., three, four, five, etc.) intermittent dwell time periods within the first time period 420a. For example, the smoothing profile 418b can be configured to ramp-up for a period of time and then hold at a first relatively constant temperature for a first intermittent time period. Following a second ramp-up period, the temperature can be held at a second relatively constant temperature for a second intermittent time period before a third ramp-up period to another intermittent temperature or the dwell temperature 414. The smoothing profiles 418a, 418b can therefore be customized to facilitate the desired cross-flow of the photo-responsive material.
In some cases, the smoothing profile 418b during the first time period 420b of
Returning to the method of
The temperature is then ramped down during the third time period 424a, 424b from the dwell temperature 414 to a predetermined finish temperature (block 320). In some embodiments the predetermined finish temperature can be zero degrees Celsius, while in other embodiments the finish temperature can be approximately the same as or different than the starting temperature. Other start and finish temperatures are contemplated and can be determined based on the characteristics of the photo-responsive material as well as other processes used to create the initial structure 210 (
While
It should be understood that there may be other steps in the process of
A material such as polyimide, metal, or glass can be used to plate the initial photo-responsive structure (block 502) to form a first structure that has the shape of the initial photoresist structure. For example, the subsequent structure can have the curves, slopes, etc., of the initial photoresist structure. This example was previously discussed with respect to
When all layers are in place, the photoresist material can then be removed using known methods, leaving the subsequent or second structure (block 510). In some embodiments, supporting material, such as a dielectric, can be flowed under and into open areas to encase the second structure (block 512). If a polyimide material has been used to form the initial structure 210 rather than photoresist, the dielectric can be flowed to encase the initial structure 210 and the second structure.
In some embodiments, additional curing steps and/or processing such as etching can be accomplished before applying a layer over the photoresist material (e.g., prior to block 502) and/or between subsequently applied layers of material (e.g., between blocks 506 and 508).
In addition to the curved, sloping structure indicated in
In some embodiments, a sloped structure for lens or optical applications can be used to form a curved or coiled (e.g., full or partial coil) optical interconnect on top of an optical generator/receiver. Instead of forming a metal coil or partial coil, as discussed with
A coiled metal structure can be formed on top of a pad that could be used for probe cards. This structure can enable high density array probe cards for an entire array contact (e.g., by keeping the coiled metal structure entirely below the footprint of the pad.
In further embodiments, additional interconnected structures can be built in layers. For example, referring again to
Some applications and/or structures may benefit from further smoothing. After a smooth surface of the 3D photo-responsive material structure is attained using the smoothing profile 418 discussed in
In some embodiments, dry etch processing can be used to “transfer” a shape, such as a slope or curve, of the initial structure onto the material below. For example, the initial structure of photo-responsive material has varying thicknesses. Material that is not covered by the photo-responsive material and thus is exposed will begin to be removed immediately. As the etching process removes the photo-responsive material, additional portions of the material below are exposed and will be removed. Therefore, the shape or topology of the photo-responsive structure is transferred to the material below that is not photo-responsive, such as but not limited to film(s), dialectic, or metal. Once the desired shape is created in the material, any remaining photoresist can be removed with wet solvent clean or other process. If desired, a flash or quick isotropic wet etch can then be performed on the remaining structure to smooth out any remaining “stepped” topographies.
Any one of the semiconductor devices, assemblies, and/or packages described above with reference to
This disclosure is not intended to be exhaustive or to limit the present technology to the precise forms disclosed herein. Although specific embodiments are disclosed herein for illustrative purposes, various equivalent modifications are possible without deviating from the present technology, as those of ordinary skill in the relevant art will recognize. In some cases, well-known structures and functions have not been shown or described in detail to avoid unnecessarily obscuring the description of the embodiments of the present technology. Although steps of methods may be presented herein in a particular order, alternative embodiments may perform the steps in a different order. Similarly, certain aspects of the present technology disclosed in the context of particular embodiments can be combined or eliminated in other embodiments. Furthermore, while advantages associated with certain embodiments of the present technology may have been disclosed in the context of those embodiments, other embodiments can also exhibit such advantages, and not all embodiments need necessarily exhibit such advantages or other advantages disclosed herein to fall within the scope of the technology. Accordingly, the disclosure and associated technology can encompass other embodiments not expressly shown or described herein.
Throughout this disclosure, the singular terms “a,” “an,” and “the” include plural referents unless the context clearly indicates otherwise. Similarly, unless the word “or” is expressly limited to mean only a single item exclusive from the other items in reference to a list of two or more items, then the use of “or” in such a list is to be interpreted as including (a) any single item in the list, (b) all of the items in the list, or (c) any combination of the items in the list. Additionally, the term “comprising” is used throughout to mean including at least the recited feature(s) such that any greater number of the same feature and/or additional types of other features are not precluded. Reference herein to “one embodiment,” “some embodiment,” or similar formulations means that a particular feature, structure, operation, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present technology. Thus, the appearances of such phrases or formulations herein are not necessarily all referring to the same embodiment. Furthermore, various particular features, structures, operations, or characteristics may be combined in any suitable manner in one or more embodiments.
From the foregoing, it will be appreciated that specific embodiments of the present technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. The present technology is not limited except as by the appended claims.
The present application claims priority to U.S. Provisional Pat. Application No. 63/315,861, filed Mar. 2, 2022, the disclosure of which is incorporated herein by reference in its entirety.
Number | Date | Country | |
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63315861 | Mar 2022 | US |