SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Abstract
This disclosure concerns a method of manufacturing a semiconductor device including preparing a support substrate including a surface region consisting of a semiconductor single crystal; forming a porous semiconductor layer by transforming the surface region of the support substrate into a porous layer; epitaxially growing a single-crystal semiconductor layer on the porous semiconductor layer; forming an opening reaching the porous semiconductor layer by removing a part of the single-crystal semiconductor layer; forming a cavity between the single-crystal semiconductor layer and the support substrate by removing the porous semiconductor layer through the opening; and filling the cavity with an insulating film or a conductive film.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIGS. 1A to 10 are plan views or cross-sectional views showing a manufacturing method of an FBC memory device according to a first embodiment of the present invention;



FIG. 11 is a cross-sectional view of the logic circuit element;



FIG. 12 is a plan view of an FBC memory device according to a second embodiment of the present invention;



FIG. 13 is a cross-sectional view taken along a line 13-13 of FIG. 12;



FIG. 14 is a cross-sectional view taken along a line 14-14 of FIG. 12;



FIG. 15 is a cross-sectional view taken along a line 15-15 of FIG. 12;



FIGS. 16A to 22B are plan views or cross-sectional views showing a manufacturing method of the FBC memory device according to the second embodiment;



FIGS. 23A to 32 are plan views or cross-sectional views showing a manufacturing method of an FBC memory device according to a third embodiment of the present invention;



FIG. 33 is a cross-sectional view of an FBC memory device according to a fourth embodiment of the present invention;



FIGS. 34A to 42B are plan views or cross-sectional views showing a manufacturing method of the FBC memory device according to the fourth embodiment;



FIGS. 43A to 49 are plan views or cross-sectional views showing a manufacturing method of an FBC memory device according to a fifth embodiment of the present invention;



FIG. 50 is a cross-sectional view showing an FBC memory device according to a fifth embodiment;



FIG. 51 is a cross-sectional view of an FBC memory device according to a sixth embodiment of the present invention;



FIGS. 52A to 59 are plan views or cross-sectional views showing a manufacturing method of the FBC memory device according to the sixth embodiment;



FIGS. 60A to 66 are plan views or cross-sectional views showing a manufacturing method of an FBC memory device according to a seventh embodiment of the present invention;



FIG. 67 is a cross-sectional view of an FBC memory device according to an eighth embodiment of the present invention; and



FIG. 68 is a cross-sectional view of an FBC memory device according to a ninth embodiment of the present invention.


Claims
  • 1. A method of manufacturing a semiconductor device comprising: preparing a support substrate including a surface region consisting of a semiconductor single crystal;forming a porous semiconductor layer by transforming the surface region of the support substrate into a porous layer;epitaxially growing a single-crystal semiconductor layer on the porous semiconductor layer;forming an opening reaching the porous semiconductor layer by removing a part of the single-crystal semiconductor layer;forming a cavity between the single-crystal semiconductor layer and the support substrate by removing the porous semiconductor layer through the opening; andfilling the cavity with an insulating film or a conductive film.
  • 2. The method of manufacturing the semiconductor device according to claim 1, wherein the forming the porous semiconductor layer includes:transforming the surface region of the support substrate into the porous layer in a first pattern, as a first porous layer transformation; andtransforming the surface region of the support substrate into the porous layer in a second pattern, as a second porous transformation, anda portion of the porous semiconductor layer in which the first pattern overlaps with the second pattern is thicker than a portion of the porous semiconductor layer in which the first pattern does not overlap with the second pattern.
  • 3. The method of manufacturing the semiconductor device according to claim 2, wherein the first porous layer transformation includes transforming the surface region of the support substrate in a source region and a drain region of a floating-body cell into the porous layer, the floating-body cell storing data according to number of majority carriers accumulated in a body in an electrically floating state, andthe second porous layer transformation includes transforming the support substrate in the source region, the drain region, and a body region of the floating-body cell into the porous layer.
  • 4. The method of manufacturing the semiconductor device according to claim 3, further comprising: forming the porous semiconductor layer after the support substrate in a region for forming a peripheral logic circuit controlling the floating-body cell is covered with a protection film;removing the protection film; andepitaxially growing a single-crystal semiconductor layer on the porous semiconductor layer and the support substrate.
  • 5. The method of manufacturing the semiconductor device according to claim 1, wherein a trench is formed in an isolation region at the same time as the formation of the opening.
  • 6. The method of manufacturing the semiconductor device according to claim 2, wherein in the first porous layer transformation and the second porous layer transformation, a part of an isolation region is not transformed into a porous layer,a support pillar consisting of a semiconductor is provided between the single-crystal semiconductor layer and the support substrate during formation of the cavity.
  • 7. The method of manufacturing the semiconductor device according to claim 1, wherein the porous semiconductor layer is formed by using a anodization.
  • 8. The method of manufacturing the semiconductor device according to claim 1, wherein after forming the cavity, an inner wall of the cavity is oxidized, thereafter, the cavity is filled with the conductive film.
  • 9. A method of manufacturing a semiconductor device comprising: preparing a support substrate;forming an insulation layer on a source formation region of the support substrate;epitaxially growing a first single-crystal semiconductor layer on the support substrate by using the insulation layer as a mask;forming a porous semiconductor layer by transforming the first single-crystal semiconductor layer into a porous layer;epitaxially growing a second single-crystal semiconductor layer on the porous semiconductor layer and on the insulation layer;forming an opening reaching the porous semiconductor layer by removing a part of the second single-crystal semiconductor layer;forming a cavity between the second single-crystal semiconductor layer and the support substrate by removing the porous semiconductor layer through the opening; andfilling the cavity with an insulating film.
  • 10. The method of manufacturing the semiconductor device according to claim 9, wherein the forming the porous semiconductor layer includes:transforming the first single-crystal semiconductor layer into the porous layer in a first pattern, as a first porous layer transformation; andtransforming the first single-crystal semiconductor layer or the surface region of the support substrate into the porous layer in a second pattern, as a second porous transformation, anda portion of the porous semiconductor layer in which the first pattern overlaps with the second pattern is thicker than a portion of the porous semiconductor layer in which the first pattern does not overlap with the second pattern,the first pattern overlaps with the second pattern in a periphery region of the insulation layer, so that a protrusion made of a semiconductor material is provided under the insulation layer.
  • 11. The method of manufacturing the semiconductor device according to claim 10, wherein the first porous layer transformation includes transforming the surface region of the support substrate in a source region and a drain region of a floating-body cell into the porous layer, the floating-body cell storing data according to number of majority carriers accumulated in a body in an electrically floating state, andthe second porous layer transformation includes transforming the support substrate in the source region, the drain region, and a body region of the floating-body cell into the porous layer.
  • 12. The method of manufacturing the semiconductor device according to claim 11, further comprising: forming the porous semiconductor layer after the support substrate in a region for forming a peripheral logic circuit controlling the floating-body cell is covered with a protection film;removing the protection film; andepitaxially growing a single-crystal semiconductor layer on the porous semiconductor layer and the support substrate.
  • 13. The method of manufacturing the semiconductor device according to claim 9, wherein a trench is formed in an isolation region at the same time as the formation of the opening.
  • 14. The method of manufacturing the semiconductor device according to claim 9, wherein the porous semiconductor layer is formed by using a anodization.
  • 15. A semiconductor device comprising: a support substrate;an insulating film provided on the support substrate;a semiconductor layer provided on the insulating film;a source layer and a drain layer formed in the semiconductor layer;a body region provided in the semiconductor layer between the source layer and the drain layer, the body region being in an electrically floating state and accumulating or discharging charges for storing data; anda protrusion formed on a surface of the support substrate and consisting of a semiconductor material so that the insulating film below the body region is thinner than the insulating film below the drain layer.
  • 16. The semiconductor device according to claim 15, further comprising: a silicon pillar provided between the support substrate and the source layer and having an opposite conductivity-type of the support substrate.
  • 17. The semiconductor device according to claim 15, wherein the protrusion is formed on the surface of the support substrate so that the insulating film below the source layer is thinner than the insulating film below the drain layer.
  • 18. The semiconductor device according to claim 15, further comprising: a plate electrode buried in the in the insulating film.
  • 19. The semiconductor device according to claim 18, further comprising: a silicon pillar provided between the support substrate and the source layer.
Priority Claims (1)
Number Date Country Kind
2006-058058 Mar 2006 JP national