Semiconductor device and manufacturing method thereof

Abstract

An object of the present invention to provide a semiconductor device having a highly functional memory element with improved reliability, and to provide a technique for manufacturing such a highly reliable semiconductor device with a high yield at low cost without complicating an apparatus or a process. As a top view shape of a memory element, a rectangular shape having a projection and a depression on the periphery, a zigzagged shape having one or plural bends, a comb shape, a ring shape having an opening (space) inside, or the like is used. Alternatively, a rectangle with a ratio of a long side to a short side being high, an ellipse with a ratio of a long axis to a short axis being high, or the like can also be used.

Description

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A to 1D are views illustrating the present invention;

FIGS. 2A to 2C are views illustrating a semiconductor device of the present invention;

FIGS. 3A to 3C are views illustrating a semiconductor device of the present invention;

FIGS. 4A and 4B are views illustrating a semiconductor device of the present invention;

FIGS. 5A to 5C are views illustrating a semiconductor device of the present invention;

FIGS. 6A and 6B are views illustrating a semiconductor device of the present invention;

FIGS. 7A and 7B are views illustrating a semiconductor device of the present invention;

FIGS. 8A and 8B are views illustrating a semiconductor device of the present invention;

FIG. 9 is a graph showing a relation between an area and a ratio of a long side to a short side of a memory element;

FIG. 10 is a view illustrating a semiconductor device of the present invention;

FIG. 11 is a view illustrating a semiconductor device of the present invention;

FIGS. 12A and 12B are views illustrating a semiconductor device of the present invention;

FIGS. 13A to 13G are views illustrating a semiconductor device of the present invention;

FIGS. 14A and 14B are views illustrating a semiconductor device of the present invention;

FIGS. 15A to 15C are graphs showing relations between the writing voltage and the writing failure rate of memory elements;

FIGS. 16A to 16C are views illustrating a memory element of the present invention;

FIGS. 17A to 17D are views illustrating a semiconductor device of the present invention;

FIGS. 18A to 18C are views illustrating the present invention;

FIGS. 19A to 19C are views illustrating a semiconductor device of the present invention; and

FIGS. 20A and 20B illustrating an examining method of a semiconductor device of the present invention.

Claims

1. A semiconductor device comprising: a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,wherein at least one of the first conductive layer and the second conductive layer has a top view shape which is bent at least once.

2. The semiconductor device according to claim 1, wherein the top view shape which is bent at least once is a comb-shape.

3. The semiconductor device according to claim 1, wherein a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

4. The semiconductor device according to claim 1, wherein a ratio of an area of the top view shape which is bent at least once to an area of a square with a same perimeter as the top view shape which is bent at least once is 0.75 or less.

5. The semiconductor device according to claim 1, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

6. A semiconductor device comprising: a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,wherein at least one of the first conductive layer and the second conductive layer has a top view ring-shape.

7. The semiconductor device according to claim 6, wherein a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

8. The semiconductor device according to claim 6, wherein a ratio of an area of the top view ring-shape to an area of a square with a same perimeter as the top view ring-shape is 0.75 or less.

9. The semiconductor device according to claim 6, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

10. A semiconductor device comprising: a memory element including a first conductive layer, a second conductive layer, and an organic compound layer interposed between the first conductive layer and the second conductive layer,wherein at least one of the first conductive layer and the second conductive layer has a top view shape with a slit.

11. The semiconductor device according to claim 10, wherein a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

12. The semiconductor device according to claim 10, wherein a ratio of an area of the top view shape with the slit to an area of a square with a same perimeter as the top view shape with the slit is 0.75 or less.

13. The semiconductor device according to claim 10, wherein an insulating layer is provided between the first conductive layer and the organic compound layer.

14. A semiconductor device comprising: a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,wherein the opening has a top view shape which is bent at least once.

15. The semiconductor device according to claim 14, wherein the top view shape which is bent at least once is a comb-shape.

16. The semiconductor device according to claim 14, wherein a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

17. The semiconductor device according to claim 14, wherein a ratio of an area of the top view shape which is bent at least once to an area of a square with a same perimeter as the top view shape which is bent at least once is 0.75 or less.

18. A semiconductor device comprising: a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,wherein the opening has a top view ring-shape.

19. The semiconductor device according to claim 18, wherein a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

20. The semiconductor device according to claim 18, wherein a ratio of an area of the top view ring-shape to an area of a square with a same perimeter as the top view ring-shape is 0.75 or less.

21. A semiconductor device comprising: a memory element including a first conductive layer, an insulating layer having an opening formed over the first conductive layer, an organic compound layer formed in the opening over the first conductive layer, and a second conductive layer formed over the organic compound layer,wherein the opening has a top view shape with a slit.

22. The semiconductor device according to claim 21, wherein a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

23. The semiconductor device according to claim 21, wherein a ratio of an area of the top view shape with the slit to an area of a square with a same perimeter as the top view shape with the slit is 0.75 or less.

24. A method for manufacturing a semiconductor device including a memory element, the memory element comprising: forming a first conductive layer having a top view shape which is bent at least once,forming an organic compound layer over the first conductive layer having the top view shape which is bent at least once, andforming a second conductive layer over the organic compound layer.

25. The method for manufacturing a semiconductor device according to claim 24, wherein the top view shape which is bent at least once is a comb-shape.

26. The method for manufacturing a semiconductor device according to claim 24, wherein the top view shape which is bent at least once is formed so that a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

27. The method for manufacturing a semiconductor device according to claim 24, wherein the top view shape which is bent at least once is formed so that a ratio of an area of the top view shape which is bent at least once to an area of a square having a same area and a same perimeter as the top view shape which is bent at least once is 0.75 or less.

28. A method for manufacturing a semiconductor device including a memory element, the memory element comprising: forming a first conductive layer having a top view ring-shape,forming an organic compound layer over the first conductive layer having the top view ring-shape, andforming a second conductive layer over the organic compound layer.

29. The method for manufacturing a semiconductor device according to claim 28, wherein the top view ring-shape is formed so that a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

30. The method for manufacturing a semiconductor device according to claim 28, wherein the top view ring-shape is formed so that a ratio of an area of the top view ring-shape to an area of a square having a same area and a same perimeter as the top view ring-shape is 0.75 or less.

31. A method for manufacturing a semiconductor device including a memory element, the memory element comprising: forming a first conductive layer having a top view shape with a slit,forming an organic compound layer over the first conductive layer having the top view shape with the slit, andforming a second conductive layer over the organic compound layer.

32. The method for manufacturing a semiconductor device according to claim 31, wherein the top view shape with the slit is formed so that a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

33. The method for manufacturing a semiconductor device according to claim 31, wherein the top view shape with the slit is formed so that a ratio of an area of the top view shape with the slit to an area of a square having a same area and a same perimeter as the top view shape with the slit is 0.75 or less.

34. A method for manufacturing a semiconductor device including a memory element, the memory element comprising: forming a first conductive layer,forming an insulating layer having an opening with a top view shape which is bent at least once over the first conductive layer,forming an organic compound layer in the opening with the top view shape which is bent at least once over the first conductive layer, andforming a second conductive layer over the organic compound layer.

35. The method for manufacturing a semiconductor device according to claim 34, wherein the top view shape which is bent at least once is a comb-shape.

36. The method for manufacturing a semiconductor device according to claim 34, wherein the top view shape which is bent at least once is formed so that a rectangle with a same area and a same perimeter as the top view shape which is bent at least once has a ratio of a long side to a short side of 3 or more.

37. The method for manufacturing a semiconductor device according to claim 34, wherein the top view shape which is bent at least once is formed so that a ratio of an area of the top view shape which is bent at least once to an area of a square having a same area and a same perimeter as the top view shape which is bent at least once is 0.75 or less.

38. A method for manufacturing a semiconductor device including a memory element, the memory element, comprising: forming a first conductive layer,forming an insulating layer having an opening with a top view ring-shape over the first conductive layer,forming an organic compound layer in the opening over the first conductive layer, andforming a second conductive layer over the organic compound layer.

39. The method for manufacturing a semiconductor device according to claim 38, wherein the top view ring-shape is formed so that a rectangle with a same area and a same perimeter as the top view ring-shape has a ratio of a long side to a short side of 3 or more.

40. The method for manufacturing a semiconductor device according to claim 38, wherein the top view ring-shape is formed so that a ratio of an area of the top view ring-shape to an area of a square having a same area and a same perimeter as the top view ring-shape is 0.75 or less.

41. A method for manufacturing a semiconductor device including a memory element, the memory element, comprising: forming a first conductive layer,forming an insulating layer having an opening with a top view shape with a slit over the first conductive layer,forming an organic compound layer in the opening over the first conductive layer, andforming a second conductive layer over the organic compound layer.

42. The method for manufacturing a semiconductor device according to claim 41, wherein the top view shape with the slit is formed so that a rectangle with a same area and a same perimeter as the top view shape with the slit has a ratio of a long side to a short side of 3 or more.

43. The method for manufacturing a semiconductor device according to claim 41, wherein the top view shape with the slit is formed so that a ratio of an area of the top view shape with the slit to an area of a square having a same area and a same perimeter as the top view shape with the slit is 0.75 or less.