Claims
- 1. A semiconductor device, comprising:
- a semiconductor substrate having first and second main surfaces, a denuded zone in which an oxygen concentration is lower than an oxygen concentration of an inner portion of the semiconductor substrate and which does not include a bulk microdefect, and an intrinsic gettering zone;
- an element region formed on the first main surface of the semiconductor substrate;
- an extrinsic gettering film made of amorphous silicon doped with boron, said gettering film trapping a metal impurity and formed directly on an intrinsic gettering zone on the second main surface; and
- an electrode-wiring layer formed on said element region and made of at least one metal selected from the group consisting of Cu and Al.
- 2. The semiconductor device according to claim 1, wherein the metal impurity contains at least one metal selected from a group consisting of Cu, Ni, Ag, Au and Fe.
- 3. The semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon substrate including crystals grown by Czochralski method.
- 4. The semiconductor device according to claim 1, further comprising a package accommodating the semiconductor substrate.
- 5. A method for manufacturing a semiconductor device comprising the steps of:
- forming an element region on a first main surface of a semiconductor substrate having first and second main surfaces and including an intrinsic gettering zone and a denuded zone; and
- forming an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, directly on at least a portion of the intrinsic gettering region or the denuded zone polished on the second main surface of the semiconductor substrate, with said amorphous semiconductor material being amorphous silicon doped with boron.
- 6. The method according to claim 5, wherein the step of forming an extrinsic gettering layer is performed after the second main surface of the semiconductor substrate has been subjected to a polishing process.
- 7. The method according to claim 6, wherein the polishing process is performed after the element region has been formed on the first main surface of the semiconductor substrate.
- 8. The method according to claim 5, wherein the steps subsequent to the step of forming an extrinsic gettering layer are performed at a temperature controlled such that the amorphous semiconductor material is kept amorphous.
- 9. The method according to claim 8, wherein the temperature is 600.degree. C. or lower.
- 10. A method for manufacturing a semiconductor device comprising the steps of:
- forming an element region on a first main surface of a semiconductor substrate having first and second main surfaces and including an intrinsic gettering zone and a denuded zone;
- forming an extrinsic gettering layer, made of an amorphous semiconductor material which traps a metal impurity, directly on at least a portion of the intrinsic gettering region or the denuded zone entirely or partially thinned on the second main surface of the semiconductor substrate, with said amorphous semiconductor material being amorphous silicon doped with boron; and
- forming an electrode wire in the element region.
- 11. The method according to claim 10, wherein steps subsequent to the step of forming an extrinsic gettering layer are performed at a temperature controlled such that the amorphous semiconductor material is kept amorphous.
- 12. The method according to claim 11, wherein the temperature is 600.degree. C. or lower.
- 13. The method according to claim 10, wherein the step of forming an extrinsic gettering layer is performed after the second main surface of the semiconductor substrate has been subjected to a polishing process.
- 14. The method according to claim 13, wherein the polishing process is performed after an element region has been formed on the first main surface of the semiconductor substrate.
- 15. The method according to claim 10, wherein the step of forming the extrinsic gettering layer is performed after the step of forming an electrode wire in the element region.
Priority Claims (1)
Number |
Date |
Country |
Kind |
6-054299 |
Mar 1994 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 08/408,880, filed Mar. 24, 1995, now abandoned.
US Referenced Citations (6)
Foreign Referenced Citations (5)
Number |
Date |
Country |
54-69964 |
Jun 1979 |
JPX |
60-117738 |
Jun 1985 |
JPX |
60-119733 |
Jun 1985 |
JPX |
4-42540 |
Feb 1992 |
JPX |
4-218921 |
Aug 1992 |
JPX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
408880 |
Mar 1995 |
|