Patent Application
20090122460
Embodiments of the present invention relate to a semiconductor device with an integrated capacitor and a method for producing the same.
With reference to the following description of the embodiments of the present invention, it is to be noted that, for simplification reasons, the same reference numerals will be used in the different figures for functionally identical or similarly acting or functionally equal, equivalent elements or steps throughout the description.
a shows a cross-sectional view of a semiconductor device according to an embodiment of the present invention;
b shows another cross-sectional view of a semiconductor device according to another embodiment of the invention;
a schematically shows a semiconductor layer after forming a depression in the semiconductor layer;
b shows the schematic cross-section of the semiconductor device after forming two barrier layers;
c shows the schematic cross-sectional image of the semiconductor device after forming an electrode layer;
d shows the schematic cross-section of the semiconductor device after introducing a sinterable, conductive granulate into the depression of the semiconductor layer, according to an embodiment of the present invention;
e shows the schematic cross-section of the semiconductor device after sintering, so that the first electrode is formed of the sintered, conductive, porous granulate, according to an embodiment of the invention;
f shows the schematic cross-section of the semiconductor device after covering the surface of the sintered, conductive, porous granulate by a dielectric material;
g shows a schematic cross-section of the semiconductor device after applying a second electrode, which at least partially covers the dielectric material, according to an embodiment of the present invention;
a shows the schematic cross-section of a semiconductor device after introducing a pre-sintered, conductive, porous granulate into the depression of a semiconductor layer, according to another embodiment of the method of producing a semiconductor device;
b shows the schematic cross-section of the semiconductor device after sintering the pre-sintered, conductive, porous granulate so that the first electrode is formed of the sintered, conductive, porous granulate; and
c shows a schematic cross-section of a semiconductor device after applying a second electrode, which at least partially covers the dielectric material, according to the embodiment of
Embodiments of the invention provide a semiconductor device with a semiconductor layer, a first electrode, which is formed by a sintered, conductive, porous granulate, and which is formed in or on the semiconductor layer or in or on at least one insulating layer arranged on the semiconductor layer. Moreover, the semiconductor device comprises a dielectric material, which covers the surface of the sintered, conductive, porous granulate, and a second electrode, which at least partially covers the dielectric material, wherein the dielectric material electrically insulates the second electrode from the first electrode.
With reference to
In an embodiment, the first electrode is formed in a recess or depression in the semiconductor layer or in a recess or depression in at least one insulating layer arranged on the semiconductor layer.
In an embodiment, the first electrode is separated from the semiconductor layer by at least one barrier layer. In an embodiment, the first electrode may be connected to an electrode layer in an electrically conductive manner.
In a further embodiment of the present invention, the sintered, conductive, porous granulate is formed by grains of a grain size of about 10 nm to about 1 μm. These grains may be grown together by the sintering into a porous conglomerate or a nanogranulate matrix connected in an electrically conductive manner. This conglomerate may be in electrically conductive connection to an electrode layer.
The sintered, conductive, porous granulate, or the sinter body, may, for example, comprise niobium, tantalum, or aluminum.
In another embodiment, the dielectric material, which electrically insulates the first and second electrodes from each other, may comprise a first dielectric layer or a first dielectric material, which lines the sintered, conductive, porous granulate, and a second dielectric material, which covers the first dielectric material.
In a further embodiment, the dielectric material or the first dielectric material comprises niobium pentoxide, tantalum pentoxide, or aluminum oxide. In another embodiment, a second dielectric material, which covers the first dielectric material, comprises aluminum oxide.
In a further embodiment of the present invention, the second electrode is a metal electrode, a metal nitride electrode, e.g., titanium nitride (TiN), tantalum nitride (TaN) or an electrolyte electrode. The electrolyte electrode may, for example, be manganese dioxide or also another solid electrolyte. The semiconductor device with integrated capacitor may, for example, be a polar capacitor, in which the anode, which is the positive pole, is formed by the sinter body, and the cathode, which is the negative pole, by the second electrode. That is, a polar capacitor should only be operated in the polarization direction indicated, since otherwise destruction of the capacitor may occur.
In another embodiment of the present invention, it has been shown that the semiconductor device may also comprise a non-polar or bipolar integrated capacitor. In this embodiment, the second electrode may be constructed of a metal, and the dielectric of the capacitor may comprise a first dielectric material, which covers the sintered, conductive, porous granulate, and a second dielectric material, which covers the first dielectric material.
In another embodiment, an integrated electric circuit may be a semiconductor device with a semiconductor layer, a first electrode, which is formed by a sintered, conductive, porous granulate, and which is formed in or on the semiconductor layer or in or on at least one insulating layer arranged on the semiconductor layer. Moreover, the semiconductor device may comprise a dielectric material, which covers the surface of the sintered, conductive, porous granulate, and a second electrode, which at least partially covers the dielectric material, wherein the dielectric material electrically insulates the second electrode from the first electrode. The integrated electric circuit may comprise, apart from the semiconductor device, further semiconductor devices, such as field effect transistors, diodes or bipolar transistors.
It is to be outlined that the term “formed on” is not used in the sense “formed directly on” herein. Rather, it is intended that this term also encompasses cases in which a first item is formed on a second item with one or more third items arranged there between.
In
As shown in
b depicts another embodiment of the invention. In this embodiment the semiconductor device 100 comprises the same configuration as described in context to
An individual grain 105 of the sintered body may itself comprise a sintered, conductive, porous granulate, wherein the granulate size may be comparable to the granulate size of the sintered body 104 depicted in
As a consequence of the larger size of the individual grains 105 in
In the embodiment of
By using the sintered, conductive, porous granulate, a large area for a capacitor can be made available by the pores of the porous sinter body. By the semiconductor device described in the embodiments with respect to
wherein ∈0 corresponds to the dielectric permittivity, ∈r corresponds to the relative permittivity, A to the area, and d to the distance of the electrodes, it can be seen that the capacitance C of a capacitor will be the greater, the greater the electrode area A and the material-specific dielectric number ∈r, and the more densely the electrodes are located with respect to each other (d). The simplest way of increasing the specific capacitance is the enlargement of the surface. Usually, this is done by the employment of surface-enlarging techniques, such as the deep trench technology. The invention allows for the realization of a substantially higher surface per defined silicon volume, and hence a substantially greater capacitance per defined silicon surface, which is given by the chip design. That is, by the use of the sintered, conductive, porous granulate in the semiconductor device as an electrode, the surface of the capacitor can be increased substantially. The sintered, conductive, porous granulate or sinter body may, for example, consist of tantalum, niobium or aluminum, which may be converted into a nanogranulate matrix by sintering.
In the discrete device technology, the use of, for example, sintered tantalum powder is one possible technique for producing the smallest poled capacitors with large capacitance.
Through the integration of the powder sinter technique into the silicon processing technology according to an embodiment of the present invention, the surface enlargement by the use of sinter bodies, which have a large surface through their porous constructions, also may be utilized in the silicon technology.
The semiconductor layer 102 may, for example, be silicon or another semiconducting material, such as gallium arsenide (GaAs), indium phosphide (InP), silicon carbide (SiC), gallium nitride (GaN), or other semiconducting materials. The semiconductor layer 102 may comprise a depression, which is lined with one or more barrier layers 110, 112 (with two barrier layers in
The embodiments described in
It is, however, also possible that other dielectric materials, for example, organic materials, are employed as dielectric material or dielectric for the integrated capacitor.
The second electrode 108, which at least partially covers the dielectric material 106, wherein the dielectric material electrically insulates the second electrode from the first one, may, for example, be an electrolytic electrode. It is, however, also possible that it is a metallic or semiconducting electrode. In the embodiments in
The material used for the second electrode depends on the type of the integrated capacitor to be realized. An electrolytic second electrode, as just described, may be used for the production of polar integrated capacitors. That is, the first electrode or anode electrode is the plus pole, and the second electrode, which may, for example, be produced by a solid electrolyte, forms the cathode of the capacitor. A wrong polarity, a too high voltage present, or a ripple current overload may lead to a short or destruction of the semiconductor device with integrated capacitor.
In a further embodiment of the present invention, for example, a metallic second electrode may be used for realizing a non-polar capacitor. When using a metallic second electrode, the device may have formed a further dielectric intermediate layer, which may consist of, e.g., aluminum oxide, between the dielectric material, which covers the surface of the sinter body, and the second electrode. The further dielectric intermediate layer, for example, of aluminum oxide (Al2O3), may prevent an interaction between the first dielectric material such as Ta2O5 or Nb2O5 and the second electrode. The further dielectric intermediate layer may comprise a thickness of about 5 nm. Thereby, shorts and a chemical interaction between the second electrode, which may comprise metal and the sintered, conductive, porous granulate can be avoided.
In a further embodiment of the present invention, a semiconductor device may comprise a semiconductor layer with a first electrode, which is formed by a sintered, conductive, porous granulate. The sintered, conductive, porous granulate may, however, also be formed on the semiconductor layer or in or on at least one insulating layer arranged on the semiconductor layer. In other words: It is also possible to form the semiconductor device so that the sintered, conductive, porous granulate is arranged on the semiconductor layer or in a dielectric layer, a so-called inter-layer dielectric (ILD) layer. The semiconductor device may comprise, as described in connection with
In embodiments of the invention, the nanogranulate matrix 104 may be formed by grains 105, which have a grain size of, for example, about 10 nm to about 1 μm. By sintering, the grains 105 may be grown together to a porous conglomerate 104 electrically connected. The sintered conglomerate 104, or the sinter body, comprises a large surface with a coral-like or sponge-like surface structure. The sintered material may, for example, be niobium, tantalum or also aluminum, as mentioned above, but the employment of other materials is also possible. In embodiments of the invention, the second electrode 108 may be formed so that it at least partially penetrates and fills the pores or hollows of the nanogranulate matrix. In embodiments of the invention, the semiconductor device may, for example, have a length and width of about 100 μm×100 μm and a depth of about 25 μm.
In
Applying the granulate to be sintered, the sinterable conductive granulate, may, for example, be done by means of a screen-printing method. Here, the granulate to be sintered may be applied into a depression of a semiconductor layer or on a semiconductor layer, or also in or on at least one insulating layer arranged on the semiconductor layer. This may be a so-called inter-layer dielectric (ILD) layer. The nanogranulate, which may be applied by means of a screen-printing method, may, for example, be a tantalum or niobium paste. The nanogranulate, the sinterable conductive granulate, may have a correspondingly high overall surface.
In a further embodiment of the method for producing the semiconductor device, forming a recess or depression in the semiconductor layer or in a dielectric layer arranged above the semiconductor layer may precede applying a sinterable, conductive granulate. Forming a recess or depression in the semiconductor layer or an overlaying insulation layer may, for example, be done by wet-chemical etching, dry etching, by laser ablation or other conventional methods for producing depressions or recesses in semiconductor structures.
Furthermore, forming a recess may comprise depositing one or more barrier or diffusion layers by means of conventional semiconductor processing technology in the recess. The barrier or diffusion layers may, for example, be silicon nitride or titanium nitride layers. It may be the task of the one or more barrier layers or of the multi-layer system to prevent or suppress diffusion of metal from the first electrode into the semiconductor layer, which may, for example, consist of silicon.
In step 204, heating the sinterable, conductive granulate may be, for example, done by inert gas or vacuum sintering at about 1100° C., so that an electrically interconnected nanogranulate matrix with a large surface develops. This nanogranulate matrix or the sintered, conductive, porous granulate may, for example, be covered with a dielectric layer or a dielectric material by anodic oxidation. Alternatively, the dielectric material may be applied by other thin film techniques or other techniques. For example, if the nanogranulate matrix is tantalum or niobium or aluminum, a defect-free dielectric formation across the large surface of the nanogranulate matrix, the sinter body, may take place by anodic oxidation, which is a voltage-dependent self-limiting process, as already explained above.
Forming, in step 208 the second electrode may, for example, be done by applying a metal layer or an electrolytic electrode. For example, the electrically insulating, porous sinter body may be soaked in an aqueous manganese (II) nitrate solution, which is then decomposed to manganese dioxide in a thermal process. Thereby, a solid electrolyte, which represents the second electrode of the integrated capacitor, develops.
In another embodiment of the present invention, the second electrode is made by a so-called atomic layer deposition. The atomic layer deposition (ALD) is a strongly altered chemical vapor deposition (CVD) method for depositing thin layers. The layer growth in the atomic layer deposition takes places in a cyclical manner, wherein the cycle is repeated until a desired thickness of the second electrode is reached. The layer growth may be self-controlling in the ALD, i.e., the amount of the layer material deposited in each cycle is constant. The atomic layer deposition may also be used so that the dielectric material, which electrically insulates the sinter body from the second electrode, is at least partially covered. That is, with the aid of the atomic layer deposition, the metallic second electrode may at least partially penetrate into pores or cavities of the nanogranulate matrix and thus form as large a capacitor area as possible.
It is also possible that the second electrode is produced by other techniques as evaporation or sputtering with a semiconducting or conducting metallic material. But also low-molecular organic conductive molecules may be evaporated, or electrically conductive polymers or other soluble, semiconducting organic materials for forming the second electrode may be applied by means of spin coating techniques or doctor blade techniques.
In a further embodiment of the method for producing a semiconductor device, after forming at least one barrier layer for accommodating the diffusion, applying an electrode layer, which serves as lead electrode layer for the first electrode, takes place. To this end, heating or sintering the sinterable, conductive granulate is performed so that the first electrode is electrically connected to the electrode layer. Applying a sinterable, conductive granulate may be performed so that niobium, tantalum or aluminum is used. Furthermore, heating or sintering the sinterable, conductive granulate may be performed so that the first electrode of the sintered, conductive, porous granulate may be formed by grains of a grain size of approximately about 10 nm to about 1 μm, which grow together to a porous conglomerate connected in electrically conductive manner by heating.
In another embodiment, sintering is performed by a so-called solid-phase sintering, liquid-phase sintering or reaction sintering. During sintering, melting and diffusion processes between the sinterable, conductive granulate may occur, so that bridges, necks or connections between the grains of the granulate form. Thereby, an electrically interconnected conglomerate, the sinter body, may develop.
In a further embodiment of the method for producing a semiconductor device, applying or introducing a sinterable, conductive granulate is done by means of printing techniques, such as the screen-printing technique. In a further embodiment, the dielectric material may be generated by means of anodic oxidation of the sintered, conductive, porous granulate. If the sintered granulate comprises niobium, tantalum or aluminum, an oxide layer of aluminum oxide, niobium pentoxide or tantalum pentoxide can be generated by the anodic oxidation of the corresponding materials.
In
As illustrated in
As illustrated in
As shown in
Sintering may also be regarded as compacting crystalline, grained or powdery substances by growing the crystallites together at corresponding heating. In sintering, however, not all components are allowed to be melted. Growing together the crystallites or grains of the granulate may take place by diffusion, i.e., a solid-solid reaction, but also one of the components in question may melt and wet the more refractory component, coat the same, and connect the same when hardening. This is referred to as melt-sintering. The sinter body distinguishes itself by the sinter necks formed between the individual granulate grains.
As illustrated in
As already mentioned above, for example, niobium pentoxide when using niobium, aluminum oxide when using aluminum, and tantalum pentoxide when using tantalum may be deposited on the surface of the sinter body. Through this anodic oxidation, for example, also areas 127 of the electrode layer 104a that have not established a fixed connection to the sinter body 104 during sintering may be covered with an oxide layer 106 for electrical insulation against a second electrode, deposited later on. But it is also possible that an insulation layer, which surrounds the surface of the porous sinter body 104 with an insulating layer 106, is produced with the aid of other fabrication techniques.
As schematically illustrated in
In
In a further embodiment of the invention, prior to depositing a second electrode, forming a dielectric intermediate layer, which covers the oxide layer 106, so that the oxide layer and the dielectric intermediate layer (not shown in
a-6c show another embodiment of the method for producing a semiconductor device. As depicted in
By a subsequent sintering 204, as illustrated in
As depicted in
The second electrode 108 may be formed by an atomic layer deposition or other methods or means as described therein. Since the empty space 113 (
Through the embodiments illustrated in
In a further embodiment of a method for producing a semiconductor device, the integrated capacitor may, for example, be produced by means of a screen-printing technique on the surface of the semiconductor substrate or at least on an insulation layer, which was arranged on the semiconductor substrate, in the form of a “nanogranulate matrix heap”. This may, for example, again be achieved with the aid of the screen-printing technique. The remaining production may be performed as set forth in the preceding embodiments, and be adapted correspondingly by someone familiar with the semiconductor process technology.
In embodiments of the present invention, it is shown that the semiconductor device may be formed as integrated polar capacitor or bipolar capacitor, and in other embodiments it is shown that, by the method for producing a semiconductor device, a polar or bipolar capacitor integrated in the semiconductor process technology with a sinter body and a correspondingly large surface, and hence capacitance, can be produced.
Through the method for producing a semiconductor device, large, previously not realized surfaces, and hence correspondingly high, integrated poled or unpoled capacitances can be realized in a microelectronics chip, that is on-chip.
While the invention has been shown and described with reference to the specific embodiments, it should be understood by those skilled in the art, that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes that come within the meaning and range of equivalency of the claims are intended to embrace.
