Patent Application
20250046612
The disclosure of Japanese Patent Application No. 2023-126951 filed on Aug. 3, 2023, including the specification, drawings and abstract is incorporated herein by reference in its entirety.
The present invention relates to a semiconductor device and its manufacturing technology, for example, a technology effective when applied to the semiconductor device and its manufacturing technology that includes a semiconductor substrate composed of a wide bandgap semiconductor material with a larger bandgap than silicon.
Japanese Patent Laid-Open No. 2017-228679 (Patent Document 1) describes a technology for improving a reliability of a semiconductor device including a SiC power transistor.
In order to improve a performance of the semiconductor device including a field effect transistor, it is considered to manufacture the semiconductor device using the semiconductor substrate composed of the wide bandgap semiconductor material with a larger bandgap than silicon.
However, with the current technology, a gate insulating film formed on the semiconductor substrate composed of the wide bandgap semiconductor material does not have as high reliability as a silicon oxide film formed on a silicon substrate. Therefore, in the semiconductor device manufactured using the semiconductor substrate composed of the wide bandgap semiconductor material, it is desired to form the gate insulating film with high reliability.
Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.
A method of manufacturing the semiconductor device according to one embodiment includes a step of forming the gate insulating film on the semiconductor substrate composed of the wide bandgap semiconductor material with the larger bandgap than silicon. In this step, the gate insulating film is formed by a chemical vapor deposition method using a material gas containing a halogen element and a metal element.
The semiconductor device according to one embodiment includes the field effect transistor having the gate insulating film formed on the semiconductor substrate composed of the wide bandgap semiconductor material with the larger bandgap than silicon. Here, the gate insulating film has the halogen element with a higher concentration than carbon. According to one embodiment, the reliability of the semiconductor device can be improved.
In all the drawings for explaining the embodiments, the same members are denoted by the same reference numerals in principle, and repetitive descriptions thereof are omitted. Note that even plan view may be hatched for the sake of clarity.
Attention has been paid to a semiconductor device (hereinafter referred to as a wide bandgap power semiconductor device) that includes a field effect transistor formed on a semiconductor substrate mainly composed of a semiconductor material with a larger bandgap than silicon.
This is because the larger bandgap means that it has a high dielectric breakdown strength, making it easier to achieve high withstand voltage.
And if the semiconductor material itself has a high dielectric breakdown strength, it is possible to ensure the breakdown voltage even if the drift layer that maintains the breakdown voltage is thin. From this, for example, by thinning the drift layer and increasing the impurity concentration, the on-resistance of the power semiconductor device can be reduced. In other words, the wide bandgap power semiconductor device is excellent in that it can balance the improvement of breakdown voltage, which is in a trade-off relationship with each other, and the reduction of on-resistance. Therefore, the wide bandgap power semiconductor device is expected as the semiconductor device that can achieve high performance.
Examples of semiconductor materials with the larger bandgap than silicon include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. Hereinafter, we will focus on silicon carbide.
In a field effect transistor (hereinafter referred to as a Si field effect transistor) having a gate insulating film formed on a silicon substrate, the gate insulating film is composed of a silicon oxide film formed by a thermal oxidation method, for example. The gate insulating film formed in this way is a high-quality film with high reliability. That is, in the Si field effect transistor, the gate insulating film can be composed of a high-quality film with high reliability.
On the other hand, in a field effect transistor (hereinafter referred to as a SiC field effect transistor) having a gate insulating film formed on a silicon carbide substrate, the gate insulating film is composed of a silicon oxynitride film (SiON) formed using NO gas or N2O gas, for example. However, it is known that it is difficult to make the gate insulating film formed in this way a film with high reliability.
Specifically, in the method of forming the gate insulating film described above, a silicon oxynitride film is formed while cutting the Si—C bond of silicon carbide by an oxidation reaction. For this reason, interface defects (dangling bonds) are formed at the interface between SiON and SiC. As a result, the density of interface defect levels in the gate insulating film is high. This may cause an increase in the on-resistance of the semiconductor device and a shift in the threshold voltage. Thus, in the SiC field effect transistor, it is difficult to compose the gate insulating film from a high-quality film.
Therefore, a method of forming the gate insulating film using the chemical vapor deposition method (CVD method) that deposits a film on the silicon carbide substrate, not by a thermal oxidation method, has been proposed. This method is not a method of forming a gate insulating film while cutting the Si—C bond of silicon carbide, so it is considered that the interface defect level can be reduced.
However, the deposited film formed by the CVD method may inherently contain elements derived from the raw material as impurities in the deposited film along with moisture due to its film formation principle. That is, in the gate insulating film formed by the CVD method, the fact that moisture and impurities derived from the raw material are included as impurities is manifested as room for improvement.
In this regard, the present inventors have acquired the following new findings.
Based on the above findings, the inventors of the present invention have found a technical idea that can form the gate insulating film with high reliability in a method of forming the gate insulating film by the CVD method. The technical idea found by the inventors will be described below.
The basic idea in the present embodiment is to form the gate insulating film on the silicon carbide substrate using a CVD method with the material gas containing the halogen element and the metal element. According to this basic idea, the material gas of the CVD method contains the halogen element. As a result, the gate insulating film contains the halogen element. However, even if the halogen element is included in the gate insulating film, there is less risk of degrading the film quality. Therefore, according to the basic idea, the gate insulating film can be formed from a film with high reliability.
In other words, according to the basic idea, a CVD method is used that deposits a film without breaking Si—C bonds, rather than a thermal oxidation method that forms a film while breaking Si—C bonds. Therefore, the interface defect level can be reduced. And since the material gas containing the halogen element that is less likely to degrade the film quality of the gate insulating film is used as the material gas of the CVD method, the film quality can be improved.
In other words, in the basic idea, a high-quality gate insulating film can be formed by the combination of (1) using a CVD method that can suppress the generation of interface defect levels, and (2) using the material gas containing the halogen element as the material gas of the CVD method.
Examples of the halogen element include fluorine or chlorine. Examples of the metal element includes aluminum (Al), hafnium (Hf), or zirconium (Zr). For example, aluminum is used when forming the gate insulating film from an aluminum oxide film (alumina film). Hafnium is used when forming the gate insulating film from a hafnium oxide film (hafnia film), and zirconium is used when the gate insulating film is formed from a zirconium oxide film.
Thus, in the basic idea, the material gas containing the halogen element and the metal element is used as the material gas of the CVD method. Furthermore, it is desirable that the material gas of the CVD method does not contain carbon and hydrogen. This is because carbon can cause degradation of the film quality of the gate insulating film. Also, if the material gas of the CVD method contains hydrogen, the gate insulating film is likely to contain moisture, a compound of hydrogen and oxygen. Moisture can migrate to the interface and cause oxidation reactions, leading to the generation of interface defect levels. Therefore, it is desirable to use the material gas that contains the halogen element and the metal element but does not contain carbon and hydrogen as the material gas of the CVD method, based on the aforementioned new findings (1), (2), and (3).
Furthermore, although it is not a requirement, it is desirable to have a process of heating the silicon carbide substrate after forming the gate insulating film. As explained in the novel finding (1) mentioned above, the gate insulating film formed by the CVD method contains moisture. This moisture moves to the interface and causes an oxidation reaction, which is the cause of the formation of interface defect levels. Therefore, in order to form the high-quality gate insulating film, it is desirable to remove the moisture contained in the gate insulating film. For this reason, it is desirable to heat the silicon carbide substrate to remove moisture from the gate insulating film.
At the silicon carbide interface, in order for the silicon carbide not to be oxidized by the reaction with the moisture that has departed, it is desirable that a heating temperature (annealing temperature) is lower than 900 degrees Celsius. This is because the temperature at which the oxidation of silicon carbide begins is 900 degrees Celsius. In other words, in order to remove moisture from the gate insulating film, it is effective that the temperature range is such that the moisture that has departed from the gate insulating film does not react with silicon carbide.
Also, in order to remove moisture from the gate insulating film, it is desirable that the heating temperature of the silicon carbide substrate is higher than a formation temperature of the gate insulating film. The heating temperature of the silicon carbide substrate is, for example, a temperature of 500 degrees Celsius or higher and less than 900 degrees Celsius.
According to the basic idea as described above, even the gate insulating film formed on the silicon carbide substrate can form the gate insulating film with high reliability.
In the following, a realization mode embodying the basic idea will be described.
In the embodiment, a process of forming the gate insulating film included in a manufacturing method of the semiconductor device is described. In particular, in the embodiment, an example of constructing the gate insulating film formed on the silicon carbide substrate from an aluminum oxide film (Al2O3 film) is explained. Also, an example of using Atomic Layer Deposition method (hereinafter, referred to as ALD method), a type of CVD method, as a film formation method for the gate insulating film is explained.
In
Here, the first material gas is AlCl3. Also, the second material gas is either H2O, O3, or N2O. And, the film formation temperature in the ALD method is, for example, 25 degrees Celsius or more and 400 degrees Celsius or less. By using such the ALD method, according to the embodiment, the gate insulating film with high reliability can be formed. That is, in the embodiment, by using AlCl3 as the first material gas containing a halogen element in the ALD method, the following characteristic points can be obtained. With this characteristic point, according to the embodiment, the gate insulating film with high reliability can be formed.
The above-mentioned characteristic points will be explained below.
The first characteristic point in the embodiment is that by using AlCl3, the amount of moisture present in the gate insulating film can be reduced. For example, when forming the gate insulating film from an aluminum oxide film, generally, trimethylaluminum (Al(CH3)3) is used as the material gas of the ALD method. In this regard, the present inventors have newly found that when trimethylaluminum is used, the amount of moisture contained in the gate insulating film increases.
Therefore, considering that the moisture contained in the gate insulating film becomes the cause of the generation of interface defect levels, it becomes difficult to form the gate insulating film with high reliability when using trimethylaluminum.
On the other hand, the present inventors have newly found that when AlCl3 is used as the material gas of the ALD method, the amount of moisture contained in the gate insulating film can be reduced compared to when trimethylaluminum is used. From this, if AlCl3 is used, the moisture in the gate insulating film, which is the cause of the generation of interface defect levels, can be reduced. Therefore, by using AlCl3, the gate insulating film with high reliability can be formed.
Below, a qualitative mechanism in which the amount of moisture contained in the gate insulating film increases when trimethylaluminum is used, and the amount of moisture contained in the gate insulating film decreases when AlCl3 is used, will be explained.
The ALD method when using trimethylaluminum has the following steps. (a1) A step of introducing trimethylaluminum. (a2) A step of purging trimethylaluminum. (a3) A step of introducing H2O (oxidizing agent). (a4) A step of purging H2O.
As a result, for example, as shown in
In contrast, the ALD method using AlCl3 has the following steps. (a1) A step of introducing AlCl3. (a2) A step of purging AlCl3. (a3) A step of introducing H2O (oxidizing agent). (a4) A step of purging H2O.
Thus, for example, as shown in
Graph (1) shows an aluminum oxide film formed by the ALD method using trimethylaluminum (TMA) as the material gas. Graph (2) shows an aluminum oxide film formed by the ALD method using AlCl3 as the material gas.
As shown in
In addition, instead of H2O, O3 or N2O can also be used as the oxidizing agent. In this case, the amount of moisture in the gate insulating film can be further reduced. This is because, while H2O contains hydrogen, O3 or N2O does not contain hydrogen, which is a constituent element of moisture, resulting in less moisture generation in the gate insulating film. In other words, from the viewpoint of reducing the amount of moisture in the gate insulating film, it is desirable to use O3 or NO as the oxidizing agent.
Next, the second characteristic point in the embodiment is that by using AlCl3, the amount of carbon present in the gate insulating film can be reduced. That is, since AlCl3 does not contain carbon, the amount of carbon contained in the gate insulating film can be reduced. In other words, considering that carbon can degrade the film quality of the gate insulating film, the fact that carbon can be reduced in the gate insulating film by using AlCl3, which does not contain carbon, as the material gas in the ALD method leads to the formation of the gate insulating film with high reliability.
For example, trimethylaluminum contains carbon as a methyl group. Therefore, when using trimethylaluminum as the material gas in the ALD method, the amount of carbon contained in the gate insulating film increases. As a result, the film quality of the gate insulating film is degraded by carbon.
In contrast, as in the embodiment, when using AlCl3, since AlCl3 does not contain carbon, the amount of carbon contained in the gate insulating film can be reduced. As a result, according to the embodiment, the amount of carbon, which is a factor in the degradation of the film quality of the gate insulating film, can be reduced. From this, according to the embodiment, the gate insulating film with high reliability can be formed.
Furthermore, Graph (3) illustrates the gate insulating film formed using AlCl3. Graph (4) illustrates the gate insulating film that underwent a heat treatment at 800 degrees Celsius after film formation using AlCl3.
Firstly, as shown in
Here, even when AlCl3, which does not contain carbon, is used as the material gas for the ALD method, it can be inferred from
Next, from
From this, it can be concluded that heat treatment is not an effective method for reducing the carbon content in the gate insulating film. On the other hand, adopting AlCl3, which does not contain carbon, instead of trimethylaluminum, which does contain carbon, is effective from the perspective of reducing the carbon content in the gate insulating film, as in the embodiment.
Next, the third characteristic point in the embodiment is that the use of AlCl3 results in a higher chlorine content in the gate insulating film. In other words, because AlCl3 contains chlorine, the chlorine content in the gate insulating film increases.
However, chlorine does not cause degradation of the film quality of the gate insulating film. Considering this, using AlCl3, which contains chlorine, as the material gas for the ALD method does not pose a problem for forming the gate insulating film with high reliability. Rather, the use of AlCl3 is useful from the perspective of forming the gate insulating film with high reliability, as it can reduce the carbon content, which can cause degradation of the film quality of the gate insulating film.
Furthermore, Graph (3) illustrates the gate insulating film formed using AlCl3. Graph (4) illustrates the gate insulating film that underwent a heat treatment at 800 degrees Celsius after film formation using AlCl3.
Firstly, as shown in
Next, from
From the above, according to the embodiment, the first, second, and third features mentioned above can be obtained by using AlCl3. As a result, in the embodiment, these features enable the formation of the gate insulating film with high reliability.
Hereinafter, the results of verification that substantiate the ability to form the gate insulating film with high reliability according to the embodiment will be described.
As shown in
This means that the aluminum oxide film formed by using AlCl3 is the gate insulating film with higher reliability than the aluminum oxide film formed by using trimethylaluminum. Therefore, from
Next,
In
As shown in
This means that the aluminum oxide film formed by using AlCl3 is the gate insulating film with higher reliability than the aluminum film formed by using trimethylaluminum. Therefore, from
Hereinafter, a qualitative mechanism will be described in which the amount of traps and the leakage current density become smaller in the aluminum oxide film formed by using AlCl3 than in the aluminum oxide film formed by using trimethylaluminum.
Through such a mechanism, it can be qualitatively understood that the high-quality gate insulating film with a small defect level density and leakage current density can be realized in the aluminum oxide film formed by using AlCl3.
According to the embodiment, the gate insulating film with high reliability can be formed. Therefore, by manufacturing a field effect transistor using the gate insulating film in the embodiment, the reliability of the semiconductor device including the field effect transistor can be improved.
Below, silicon carbide is mentioned as an example of a wide bandgap semiconductor material with the larger bandgap than silicon. And, as an application example of the gate insulating film in the embodiment, a SiC field effect transistor having the gate insulating film formed on the silicon carbide substrate is explained as an example. In particular, in Application Example 1, a semiconductor device including a planar type SiC field effect transistor is described. In Application Example 2, a semiconductor device including a trench gate type SiC field effect transistor is described.
The silicon carbide semiconductor substrate SUB is, for example, an n+ type semiconductor substrate. On a bottom side of the silicon carbide semiconductor substrate SUB, the backside high concentration semiconductor layer BNL made of an n+ type semiconductor layer is formed, for example, the backside silicide BSL is formed so as to contact this backside high concentration semiconductor layer BNL. The backside silicide BSL is composed of, for example, nickel silicide. And a bottom electrode BE is formed so as to contact this backside silicide BSL. The bottom electrode BE is composed of, for example, a laminated film made of a titanium film, a nickel film, and a gold film.
Next, the epitaxial layer EPI is formed on an upper surface of the silicon carbide semiconductor substrate SUB. The epitaxial layer EPI is made of, for example, an n-type semiconductor layer. Inside the epitaxial layer EPI, a plurality of channel layers CH made of, for example, a p-type semiconductor layer are formed so as to be separated from each other. And the source region SR and the body contact region PR that contact each other are formed inside each of the plurality of channel layers CH.
Therefore, as shown in
Next, as shown in
The gate insulating film GOX is composed of the gate insulating film described in the embodiment. That is, the gate insulating film GOX is composed of an aluminum oxide film formed by using AlCl3 as a material gas of an ALD method. As a result, the gate insulating film GOX has a halogen element (chlorine) with a higher concentration than carbon.
A gate electrode GE is formed on the gate insulating film GOX. The gate electrode GE is composed of a polysilicon film into which an n-type impurity (donor) such as phosphorus (P) or arsenic (As) has been introduced. The interlayer insulating film IL is formed so as to cover the gate electrode GE. The interlayer insulating film IL is composed of a silicon oxide film, for example.
In the interlayer insulating film IL thus configured, a contact hole CNT reaching the source region SR and the body contact region PR is formed. On a surface of the source region SR and the body contact region PR exposed from a bottom surface of the contact hole CNT, a metal silicide SL is formed. The metal silicide SL is composed of nickel silicide, for example. The source electrode SE is formed to fill the inside of the contact hole CNT and on the interlayer insulating film IL. As a result, the source electrode SE is electrically connected to the source region SR and the body contact region PR. The source electrode SE is composed of a laminated film consisting of a titanium film, a titanium nitride film, and an aluminum film, for example. The passivation film PAS is formed on the source electrode SE. The passivation film PAS is composed of a polyimide resin film, for example.
In this way, the semiconductor device in Application Example 1 is configured.
In the semiconductor device of Application Example 1, the gate insulating film described in the embodiment is used. Therefore, the gate insulating film GOX of the semiconductor device becomes a gate insulating film with high reliability. As a result, according to the semiconductor device in Application Example 1, reliability can be improved.
Next, a manufacturing method of the semiconductor device in Application Example 1 will be described.
Next, the channel layer CH is formed inside the epitaxial layer EPI by using photolithography technology and ion implantation method (S103). The channel layer CH is a p-type semiconductor layer. The channel layer CH is formed by introducing a p-type impurity such as aluminum into the epitaxial layer EPI. Then, the source region SR is formed inside the channel layer CH by using photolithography technology and ion implantation method (S104). The source region SR is an n+ type semiconductor region. The source region SR is formed by introducing an n-type impurity such as nitrogen into the channel layer CH.
Subsequently, the body contact region PR in contact with the source region SR is formed inside the channel layer CH by using photolithography technology and ion implantation method (S105). The body contact region PR is a p+ type semiconductor region. The body contact region PR is formed by introducing a p-type impurity such as aluminum into the channel layer CH. Then, the backside high concentration semiconductor layer BNL is formed on the bottom surface of the silicon carbide semiconductor substrate SUB by using an ion implantation method (S106). The backside high concentration semiconductor layer BNL is an n+ type semiconductor layer. The backside high concentration semiconductor layer BNL is formed, for example, by introducing n-type impurities such as nitrogen into the silicon carbide semiconductor substrate SUB.
Next, the silicon carbide semiconductor substrate SUB is heated to perform activation annealing (S107). The activation annealing is performed, for example, by heating the silicon carbide semiconductor substrate SUB to 1700 degrees Celsius. By this activation annealing, the conduction type impurities introduced into the channel layer CH, the source region SR, the body contact region PR and the backside high concentration semiconductor layer BNL formed by the ion-implantation method are activated.
Subsequently, the gate insulating film GOX is formed on the upper surface of the epitaxial layer EPI, which has formed the channel layer CH, the source region SR, and the body contact region PR (S108). The gate insulating film GOX is formed by the ALD method using AlCl3 as the material gas. As a result, the gate insulating film GOX is composed of an aluminum oxide film.
As described in the embodiment, the aluminum oxide film formed by the ALD method using AlCl3 has a small defect level density and leakage current density, and is a high-quality film. Therefore, the gate insulating film GOX becomes the gate insulating film with high reliability.
Here, after forming the gate insulating film GOX, it is effective to heat the silicon carbide semiconductor substrate SUB at a temperature lower than 900 degrees Celsius, which is higher than a formation temperature of the gate insulating film GOX. This is because, by this heating process, moisture can be desorbed from the gate insulating film GOX at a temperature at which the silicon carbide semiconductor substrate SUB is not oxidized (a temperature lower than 900 degrees Celsius).
Subsequently, the gate electrode GE is formed on the gate insulating film GOX (S109). The gate electrode GE can be formed by using CVD method and patterning technology. Specifically, the gate electrode GE can be formed by depositing a polysilicon film doped with n-type impurities such as nitrogen, and then patterning this polysilicon film by photolithography and etching techniques.
Then, an interlayer insulating film IL is formed on the upper surface of the epitaxial layer EPI, which has formed the channel layer CH, the source region SR, and the body contact region PR, so as to cover the gate electrode GE (S110). The interlayer insulating film IL is composed of, for example, a silicon oxide film. The silicon oxide film can be formed by using the CVD method.
Next, the contact hole CNT is formed in the interlayer insulating film IL by using photolithography and etching techniques (S111). The contact hole CNT is formed so as to reach both the source region SR and the body contact region PR by penetrating the interlayer insulating film IL.
Subsequently, the metal silicide SL is formed on the surface of the source region SR and the body contact region PR exposed from the bottom surface of the contact hole CNT (S112). The metal silicide SL is composed of, for example, nickel silicide. Nickel silicide can be formed by forming a nickel film on the interlayer insulating film IL including the bottom surface of the contact hole CNT, and then performing a silicide annealing at 1000 degrees Celsius on the silicon carbide semiconductor substrate SUB. As mentioned above, it is desirable to remove moisture from the gate insulating film GOX by heating the silicon carbide semiconductor substrate SUB after forming the gate insulating film GOX. That is, a heating process for removing moisture from the gate insulating film GOX may be performed after forming the gate insulating film GOX. In this case, the moisture in the gate insulating film GOX is removed at the stage of performing the silicide annealing. Therefore, oxidation of the silicon carbide semiconductor substrate SUB can be suppressed by the silicide annealing.
However, the above-mentioned heating process after forming the gate insulating film GOX can also be substituted with the silicide annealing. In other words, it is permissible to remove moisture from the gate insulating film GOX by the silicide annealing, without performing a heat treatment process after forming the gate insulating film GOX. Thus, not only the function of forming the metal silicide SL, but also the function of removing moisture from the gate insulating film GOX can be shared by the silicide annealing.
In this case, since the temperature of the silicide annealing is higher than the oxidation temperature of silicon carbide, the moisture that departs and the silicon carbide oxidize by the silicide annealing. Therefore, when removing moisture from the gate insulating film GOX by the silicide annealing, it is important to sufficiently reduce the moisture contained in the gate insulating film GOX by adjusting the film formation conditions when forming the gate insulating film GOX.
Subsequently, the inside of the contact hole CNT, which has formed the metal silicide SL on the bottom surface, is filled, and the source electrode SE is formed on the interlayer insulating film IL (S113). The source electrode SE is composed of a laminated film consisting of, for example, a titanium film, a titanium nitride film, and an aluminum film. The source electrode SE can be formed, for example, by using a sputtering method. Then, the passivation film PAS is formed on the source electrode SE (S114). The passivation film PAS is a surface protection film. The passivation film PAS is composed of, for example, a polyimide resin film. The polyimide resin film can be formed, for example, by a coating method.
Next, the backside silicide BSL that contacts the backside high-concentration semiconductor layer BNL formed on the bottom surface of the silicon carbide semiconductor substrate SUB is formed (S115). The backside silicide BSL is composed of, for example, nickel silicide. Nickel silicide can be formed by forming a nickel film that contacts the backside high-concentration semiconductor layer BNL and then performing the silicide annealing, which is a heat treatment at 1000 degrees Celsius, on the silicon carbide semiconductor substrate SUB.
Subsequently, the bottom electrode BE that contacts the backside silicide BSL is formed (S116). The bottom electrode BE is composed of a laminated film consisting of, for example, a titanium film, a nickel film, and a gold film. The bottom electrode BE can be formed, for example, by using a sputtering method.
In this way, the semiconductor device in Application Example 1 can be manufactured. In the semiconductor device of Application Example 1, an aluminum oxide film formed by the ALD method using AlCl3 is used. Therefore, the gate insulating film GOX of the semiconductor device in Application Example 1 becomes the gate insulating film with high reliability. As a result, the reliability can be improved according to the semiconductor device in Application Example 1.
The silicon carbide semiconductor substrate SUB is, for example, an n+ type semiconductor substrate. On a bottom surface of the silicon carbide semiconductor substrate SUB, the backside high-concentration semiconductor layer BNL composed of, for example, an n+ type semiconductor layer is formed. The backside silicide BSL is formed so as to contact this backside high-concentration semiconductor layer BNL. The backside silicide BSL is composed of, for example, nickel silicide. Then, the bottom electrode BE is formed so as to contact the backside silicide BSL. The bottom electrode BE is composed of a laminated film consisting of, for example, a titanium film, a nickel film, and a gold film.
Next, an epitaxial layer EPI is formed on an upper surface of the silicon carbide semiconductor substrate SUB. The epitaxial layer EPI is, for example, composed of an n-type semiconductor layer. The channel layer CH, which is, for example, composed of a p-type semiconductor layer, is formed on the epitaxial layer EPI. Inside the channel layer CH, a plurality of source regions SR and a plurality of body contact regions PR are formed. For example,
Next, as shown in
The gate insulating film GOX is formed on an inner wall of the trench TR. This gate insulating film GOX is composed of the gate insulating film described in the embodiment. That is, the gate insulating film GOX is composed of an aluminum oxide film formed using AlCl3. As a result, the gate insulating film GOX has a halogen element (chlorine) with a higher concentration than carbon.
Next, the gate electrode GE is embedded in the trench TR through the gate insulating film GOX. This gate electrode GE is formed to have a portion embedded in the trench TR and a portion protruding above the trench TR. The gate electrode GE is, for example, composed of a polysilicon film into which n-type impurities (donors) such as phosphorus (P) and arsenic (As) have been introduced. The interlayer insulating film IL is formed to cover the channel layer CH on which the source region SR and the body contact region PR are formed and the gate electrode GE. The interlayer insulating film IL is, for example, composed of a silicon oxide film.
In the interlayer insulating film IL configured as described above, a contact hole CNT reaching the source region SR and the body contact region PR is formed. The metal silicide SL is formed on a surface of the source region SR and the body contact region PR exposed from a bottom surface of the contact hole CNT. The metal silicide SL is, for example, composed of nickel silicide. Then, the source electrode SE is formed to fill the inside of the contact hole CNT and on the interlayer insulating film IL. As a result, the source electrode SE is electrically connected to the source region SR and the body contact region PR. The source electrode SE is, for example, composed of a laminated film consisting of a titanium film, a titanium nitride film, and an aluminum film. The passivation film PAS is formed on the source electrode SE. The passivation film PAS is, for example, composed of a polyimide resin film.
In this way, the semiconductor device in Application Example 2 is configured.
Even in the semiconductor device of Application Example 2, the gate insulating film described in the embodiment is used. Therefore, the gate insulating film GOX of the semiconductor device becomes the gate insulating film with high reliability. As a result, according to the semiconductor device in Application Example 2, reliability can be improved.
Next, a manufacturing method of the semiconductor device in Application Example 2 will be described. Note that the manufacturing method of the semiconductor device in Application Example 2 is almost the same as the manufacturing method of the semiconductor device in Application Example 1, so the same steps are omitted and the different steps are mainly described. In particular, the manufacturing method of the semiconductor device in Application Example 2 will be described using
In
Next, the trench TR is formed using photolithography and etching techniques. The trench TR is formed to penetrate the channel layer CH, which has formed the source region SR and the body contact region PR, so that the bottom of the trench TR reaches inside the epitaxial layer EPI (see
Subsequently, the gate insulating film GOX is formed on the channel layer CH, which has formed the source region SR and the body contact region PR, and on the inner wall of the trench TR (S108). The gate insulating film GOX is formed by the ALD method using AlCl3 as a material gas. As a result, the gate insulating film GOX is composed of an aluminum oxide film.
As described in the embodiment, the aluminum oxide film formed by the ALD method using AlCl3 has a small defect level density and leakage current density, and is a high-quality film. Therefore, the gate insulating film GOX becomes a high-quality gate insulating film with high reliability.
Afterwards, the gate electrode GE, which has a portion filling the trench TR through the gate insulating film GOX and a portion protruding above the trench TR, is formed (S109). The gate electrode GE can be formed using a CVD method and patterning techniques. Specifically, the gate electrode GE can be formed by depositing a polysilicon film, to which an n-type impurity such as nitrogen has been added, on the channel layer CH, which has formed the source region SR and the body contact region PR, and inside the trench TR, and then patterning this polysilicon film using photolithography and etching techniques.
The steps from S110 to S116 shown in
The invention made by the present inventor has been described above in detail based on the embodiment, but the present invention is not limited to the embodiment described above, and it is needless to say that various modifications can be made without departing from the gist thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2023-126951 | Aug 2023 | JP | national |
