SEMICONDUCTOR DEVICE AND MODULE

Abstract

A semiconductor device that includes: a substrate having a first main surface and a second main surface opposite to each other in a thickness direction; a circuit layer on the first main surface of the substrate; and a first resin body between an end portion of the substrate and the first outer electrode, and between the end portion of the substrate and the second outer electrode in a plan view in the thickness direction. In the thickness direction, a leading end of the first resin body is positioned higher than top ends of the first and second outer electrodes. In a sectional view, a first side surface of the first resin body approaches a second side surface of the first resin body on a side close to the end portion of the substrate, and the second side surface rises steeply against a first main surface of the substrate.

Description

TECHNICAL FIELD

The present invention relates to a semiconductor device and a module.

BACKGROUND ART

A metal-insulator-metal (MIM) capacitor, for example, is known as a typical capacitor element used in a semiconductor integrated circuit. The MIM capacitor is a capacitor having a parallel plate type structure in which an insulator is sandwiched by a lower electrode and an upper electrode.

Patent Document 1 discloses an electronic component including a circuit element formed on a substrate, at least one pair of terminal electrodes connected to the circuit element and disposed side by side on at least one surface, and a support body formed to protrude from the at least one pair of terminal electrodes and provided in a region of the at least one surface not overlapping with the circuit element in plan view. Patent Document 1 describes, as an example of an electronic component, a capacitor in which a lower electrode, a dielectric layer, a first electrode, a first protection layer, a second electrode, a second protection layer, a terminal electrode, and a support body are laminated in this order on a substrate.

• • Patent Document 1: Japanese Patent No. 5445357

SUMMARY OF THE INVENTION

When an electronic component is mounted on an external substrate or the like using a surface mounting machine (mounter), a load is applied in a thickness direction of the electronic component at the time of mounting on the substrate. In a case that an excessive load is applied to the electronic component, the load becomes an impact force, and a circuit element formed in the electronic component may be damaged. With the use of the electronic component described in Patent Document 1, it is conceived that mechanical breakage of an electronic component which may occur at the time of mounting is prevented because the support body protrudes from at least one pair of terminal electrodes. In other words, the support body is formed thicker than the at least one pair of terminal electrodes, and the support body receives, disperses, and alleviates a load applied from the outside.

However, in the electronic component described in Patent Document 1, insufficient effect of alleviating a load applied to a surface of an element at the time of mounting may cause breakage of the element by the load transferred from the support body.

The present invention has been made to solve the above-described problem, and an object thereof is to provide a semiconductor device in which breakage of an element is prevented even when a load is applied. Another object of the present invention is to provide a module including the semiconductor device above.

The semiconductor device of a preferred embodiment of the present invention includes: a substrate having a first main surface and a second main surface opposite to each other in a thickness direction; a circuit layer on the first main surface of the substrate, wherein the circuit layer has a first electrode layer on a side thereof proximal to the substrate, a second electrode layer facing the first electrode layer, a dielectric layer between the first electrode layer and the second electrode layer in the thickness direction, a first outer electrode extending to a surface of the circuit layer on a side opposite to the substrate and a second outer electrode extending to the surface of the circuit layer on the side opposite to the substrate and separated from the first outer electrode; and a first resin body between an end portion of the substrate and the first outer electrode, and between the end portion of the substrate and the second outer electrode in a plan view in the thickness direction. In the thickness direction, a leading end of the first resin body on the side opposite to the substrate is positioned higher than top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate. In a sectional view in a direction perpendicular to the thickness direction, a first side surface of the first resin body on a side close to the first outer electrode or close to the second outer electrode approaches a second side surface of the first resin body on a side close to the end portion of the substrate from the side close to the substrate toward the side opposite to the substrate, and the second side surface of the first resin body on the side close to the end portion of the substrate rises steeply against the first main surface of the substrate.

The module of the present invention includes the semiconductor device of the present invention, and a wiring substrate having a first land electrically connected to the first outer electrode and a second land electrically connected to the second outer electrode.

According to the present invention, it is possible to provide a semiconductor device in which breakage of an element is prevented even when a load is applied. Further, according to the present invention, a module including the semiconductor device above may be provided.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1-1 is a schematic plan view of a capacitor according to Embodiment 1 of the present invention illustrating an example thereof.

FIG. 1-2 is a schematic sectional view of a portion corresponding to a line segment A1-A2 in FIG. 1-1.

FIG. 1-3 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 1-1.

FIG. 2-1 is a schematic sectional view of a capacitor having a structure according to the present invention illustrating a state in which a load is applied to a first resin body.

FIG. 2-2 is a schematic sectional view of a capacitor having a structure in the past illustrating a state in which a load is applied to a first resin body.

FIG. 3 is a schematic plan view of a capacitor according to Embodiment 1 of the present invention illustrating a modification thereof.

FIG. 4-1 is a schematic sectional view for explaining an example of a process of forming an insulation layer.

FIG. 4-2 is a schematic sectional view for explaining an example of a process of forming a first electrode layer.

FIG. 4-3 is a schematic sectional view for explaining an example of a process of forming a dielectric layer.

FIG. 4-4 is a schematic sectional view for explaining an example of a process of forming a second electrode layer.

FIG. 4-5 is a schematic sectional view for explaining an example of a process of forming a moisture-resistant protection layer.

FIG. 4-6 is a schematic sectional view for explaining an example of a process of forming a resin protection layer.

FIG. 4-7 is a schematic sectional view for explaining an example of a process of forming a seed layer.

FIG. 4-8 is a schematic sectional view for explaining an example of a process of forming a first plating layer and a second plating layer.

FIG. 4-9 is a schematic sectional view for explaining an example of a process of removing part of the seed layer.

FIG. 4-10 is a schematic sectional view for explaining an example of a process of forming a photosensitive resin film.

FIG. 4-11 is a schematic sectional view for explaining an example of a process of forming a first resin body.

FIG. 5 is a schematic sectional view of a module according to Embodiment 1 of the present invention.

FIG. 6 is a schematic sectional view of the module according to Embodiment 1 of the present invention illustrating a state that a mold resin is provided.

FIG. 7-1 is a schematic plan view of a capacitor according to Embodiment 2 of the present invention illustrating an example thereof.

FIG. 7-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 7-1.

FIG. 8-1 is a schematic plan view of a capacitor according to Embodiment 3 of the present invention illustrating an example thereof.

FIG. 8-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 8-1.

FIG. 9-1 is a schematic plan view of a capacitor according to Embodiment 4 of the present invention illustrating an example thereof.

FIG. 9-2 is a schematic sectional view of a portion corresponding to a line segment A1-A2 in FIG. 9-1.

FIG. 10-1 is a schematic plan view of a capacitor according to Embodiment 5 of the present invention illustrating an example thereof.

FIG. 10-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 10-1.

FIG. 11-1 is a schematic plan view of the capacitor according to Embodiment 5 of the present invention illustrating a modification thereof.

FIG. 11-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 11-1.

FIG. 12-1 is a schematic plan view of a capacitor according to Embodiment 6 of the present invention illustrating an example thereof.

FIG. 12-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 12-1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, preferred embodiments of a semiconductor device and a module of the present invention will be described.

However, the present invention is not limited to the following configuration, and can be appropriately modified and applied within a range not changing the gist of the present invention. Combinations of two or more of the individual preferred configurations of the present invention described below are also included in the present invention.

Each embodiment described below is an example, and it is needless to say that partial replacement or combination of configurations described in different embodiments is possible. In the second and subsequent embodiments, descriptions of matters common to those in Embodiment 1 will be omitted, and only different points will be described. In particular, similar functions and effects obtained in a similar configuration will not be described in each embodiment.

In the following description, when the embodiments are not particularly distinguished from each other, they are simply referred to as “semiconductor device of the present invention” and “module of the present invention”. The shape, arrangement, and the like of the semiconductor device, the module, and each constituent element of the present invention are not limited to the illustrated examples.

In the following description, a capacitor will be taken as an example of an embodiment of the semiconductor device according to the present invention. The semiconductor device according to the present invention may be a capacitor itself (that is, capacitor element), or may be a device including a capacitor.

Embodiment 1

A semiconductor device of a preferred embodiment of the present invention includes a substrate, a circuit layer, and a first resin body. In the semiconductor device of the preferred embodiment of the present invention, a first resin body is provided between an end portion of the substrate and a first outer electrode, and between the end portion of the substrate and a second outer electrode in plan view in a thickness direction. In the thickness direction, a leading end of the first resin body on a side opposite to the substrate is positioned higher than top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate. In a sectional view in a direction perpendicular to the thickness direction, a side surface of the first resin body on a side close to the first outer electrode or close to the second outer electrode approaches a side surface of the first resin body on a side close to the end portion of the substrate from a side close to the substrate toward the side opposite to the substrate, and the side surface of the first resin body on the side close to the end portion of the substrate rises steeply against a first main surface of the substrate. In the semiconductor device of the present invention, the first resin body may have a first outer peripheral portion provided along the end portion of the substrate between the end portion of the substrate and the first outer electrode in plan view in the thickness direction, and a second outer peripheral portion provided along the end portion of the substrate between the end portion of the substrate and the second outer electrode in plan view in the thickness direction. Such an example will be described below as a capacitor according to Embodiment 1 of the present invention.

FIG. 1-1 is a schematic plan view of the capacitor according to Embodiment 1 of the present invention illustrating an example thereof. FIG. 1-2 is a schematic sectional view of a portion corresponding to a line segment A1-A2 in FIG. 1-1. FIG. 1-3 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 1-1.

In the present description, a length direction, a width direction, and a thickness direction of a capacitor (semiconductor device) are defined as directions defined by an arrow L, an arrow W, and an arrow T, respectively, as illustrated in FIG. 1-1, FIG. 1-2, FIG. 1-3, or the like. Here, a length direction L, a width direction W, and a thickness direction T are orthogonal to each other.

As illustrated in FIG. 1-1, FIG. 1-2, and FIG. 1-3, a capacitor 1 includes a substrate 10, a circuit layer 20, and a first resin body 30.

The substrate 10 has a first main surface 10a and a second main surface 10b opposite to each other in the thickness direction T. The first main surface 10a and the second main surface 10b are opposed to each other in the thickness direction T.

Examples of the constituent material of the substrate 10 include semiconductors such as silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs).

The electrical resistivity of the substrate 10 is preferably 10⁻⁵ Ω·cm to 10⁻⁵ Ω·cm.

A measurement of the substrate 10 in the length direction L is preferably 200 μm to 600 μm.

A measurement of the substrate 10 in the width direction W is preferably 100 μm to 300 μm.

A measurement (thickness) of the substrate 10 in the thickness direction T is preferably 50 μm to 250 μm.

The circuit layer 20 is provided on the first main surface 10a of the substrate 10. The circuit layer 20 includes an insulation layer 21, a first electrode layer 22, a dielectric layer 23, a second electrode layer 24, a moisture-resistant protection layer 25, a resin protection layer 26, a first outer electrode 27, and a second outer electrode 28. Although the circuit layer 20 is provided on the entire first main surface 10a of the substrate 10 in Embodiment 1, the circuit layer 20 may be provided on part of the first main surface 10a of the substrate 10. In the case above, the circuit layer 20 is preferably provided in a center position on the first main surface 10a of the substrate 10, and is preferably provided at a position where a center axis of the substrate 10 and a center axis of the circuit layer 20 substantially coincide with each other.

A measurement of the circuit layer 20 in the thickness direction T is preferably 5 μm to 70 μm. The measurement of the circuit layer 20 in the thickness direction T is determined by a measurement from a surface of the insulation layer 21 on a side close to the substrate 10 to the furthest surface positioned on a side opposite to the substrate 10 out of outermost surfaces of the first outer electrode 27 and the second outer electrode 28.

The insulation layer 21 is provided on the entire first main surface 10a of the substrate 10. Although the insulation layer 21 may be provided on part of the first main surface 10a of the substrate 10, the insulation layer 21 needs to be provided in a region larger than the first electrode layer 22 and overlapping with the entire area of the first electrode layer 22. For example, the insulation layer 21 can be provided on part of the first main surface 10a of the substrate 10 by forming an insulation layer on the entire first main surface 10a of the substrate 10, and then removing part of the insulation layer with an etching method. The insulation layer is formed on the entire first main surface 10a of the substrate 10 by oxidizing the first main surface 10a of the substrate 10 with a thermal-oxidizing method or depositing a film with a sputtering method or a chemical vapor deposition (CVD) method.

Examples of the constituent material of the insulation layer 21 include silicon oxide (SiO, SiO₂), silicon nitride (SiN), aluminum oxide (Al₂O₃), hafnium oxide (HfO₂), tantalum oxide (Ta₂O₅), and zirconium oxide (ZrO₂).

The insulation layer 21 may have a single-layer structure or a multilayer structure including a plurality of layers made of the above-described materials.

A measurement (thickness) of the insulation layer 21 in the thickness direction T is preferably 0.5 μm to 3 μm.

The first electrode layer 22 is provided on a surface of the circuit layer 20 on the side close to the substrate 10, here, on the surface of the insulation layer 21 on the side opposite to the substrate 10. The first electrode layer 22 is provided inside a position separated from an end portion of the substrate 10. More specifically, an end portion of the first electrode layer 22 is positioned at an inside of the end portion of the substrate 10. In plan view in FIG. 1-1, a distance between the end portion of the first electrode layer 22 and the end portion of the substrate 10 is preferably 5 μm to 30 μm. The end portion of the first electrode layer 22 may be provided on the surface of the insulation layer 21 up to the end portion of the substrate 10.

Examples of the constituent material of the first electrode layer 22 include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), and titanium (Ti). The constituent material of the first electrode layer 22 may be an alloy containing at least one of the above-described metals, and specific examples thereof include an aluminum-silicon alloy (AlSi), an aluminum-copper alloy (AlCu), and an aluminum-silicon-copper alloy (AlSiCu).

The first electrode layer 22 may have a single-layer structure or a multilayer structure including a plurality of conductor layers made of the above-described materials.

A measurement (thickness) of the first electrode layer 22 in the thickness direction T is preferably 0.3 μm to 10 μm, and more preferably 0.5 μm to 5 μm.

The dielectric layer 23 is provided between the first electrode layer 22 and the second electrode layer 24 in the thickness direction T, that is, in a direction orthogonal to the first main surface 10a of the substrate 10. The dielectric layer 23 is provided so as to cover the first electrode layer 22 except for an opening, and an end portion of the dielectric layer 23 is provided on the surface of the insulation layer 21 from the end portion of the first electrode layer 22 to the end portion of the substrate 10 as well.

Examples of the constituent material of the dielectric layer 23 include silicon nitride (SiN), silicon oxide (SiO, SiO₂), aluminum oxide (Al₂O₃), hafnium oxide (HfO₂), tantalum oxide (Ta₂O₅), and zirconium oxide (ZrO₂). In particular, the dielectric layer 23 preferably includes at least one of silicon nitride and silicon oxide.

A measurement (thickness) of the dielectric layer 23 in the thickness direction T is preferably 0.02 μm to 4 μm.

The second electrode layer 24 is provided to face the first electrode layer 22. More specifically, the second electrode layer 24 is provided on a surface of the dielectric layer 23 on the side opposite to the substrate 10, and faces the first electrode layer 22 with the dielectric layer 23 interposed therebetween.

Examples of the constituent material of the second electrode layer 24 include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), and titanium (Ti). The constituent material of the second electrode layer 24 may be an alloy containing at least one of the above-described metals, and specific examples thereof include an aluminum-silicon alloy (AlSi), an aluminum-copper alloy (AlCu), and an aluminum-silicon-copper alloy (AlSiCu).

The second electrode layer 24 may have a single-layer structure or a multilayer structure including a plurality of conductor layers made of the above-described materials.

A measurement (thickness) of the second electrode layer 24 in the thickness direction T is preferably 0.3 μm to 10 μm, and more preferably 0.5 μm to 5 μm.

The first electrode layer 22, the dielectric layer 23, and the second electrode layer 24 constitute a capacitor element. More specifically, capacitance of the capacitor element is formed in a region where the first electrode layer 22, the dielectric layer 23, and the second electrode layer 24 overlap with each other.

The moisture-resistant protection layer 25 is provided so as to cover the dielectric layer 23 and the second electrode layer 24 except for an opening. Providing the moisture-resistant protection layer 25 enhances a moisture resistant property of the capacitor element, in particular, of the dielectric layer 23.

Examples of the constituent material of the moisture-resistant protection layer 25 include silicon nitride (SiN) and silicon oxide (SiO₂).

A measurement (thickness) of the moisture-resistant protection layer 25 in the thickness direction T is preferably 0.5 μm to 3 μm.

The resin protection layer 26 is provided so as to cover the first electrode layer 22 and the second electrode layer 24. Here, the resin protection layer 26 is provided on a surface of the moisture-resistant protection layer 25 on the side opposite to the substrate 10. Further, the resin protection layer 26 is provided to extend up to the end portion of the substrate 10, and is provided with openings at respective positions below. The first position overlaps with the openings of the dielectric layer 23 and the moisture-resistant protection layer 25 (openings overlapping with the first electrode layer 22), and the second position overlaps with the opening of the moisture-resistant protection layer 25 (opening overlapping with the second electrode layer 24). Providing the resin protection layer 26 enables to sufficiently protect the capacitor element, in particular, the dielectric layer 23 from moisture.

Examples of the constituent material of the resin protection layer 26 include resins such as a polyimide resin, a polybenzoxazole resin, a benzocyclobutene resin, and a resin in a solder resist.

A measurement (thickness) of the resin protection layer 26 in the thickness direction T is preferably 1 μm to 20 μm.

The first outer electrode 27 extends to the surface of the circuit layer 20 on the side opposite to the substrate 10, and is separated from the second outer electrode 28. That is, the first outer electrode 27 is positioned on the first electrode layer 22 on the side opposite to the substrate 10. Here, the first outer electrode 27 is electrically connected to the first electrode layer 22. More specifically, the openings respectively provided to the dielectric layer 23, the moisture-resistant protection layer 25, and the resin protection layer 26 are communicated with each other along the thickness direction T to extend, and the first outer electrode 27 is electrically connected to the first electrode layer 22 through the openings. Further, the first outer electrode 27 is separated from the second electrode layer 24 in a plane along the length direction L and the width direction W (see FIG. 1-1), and thus the first outer electrode 27 is not electrically connected to the second electrode layer 24.

The first outer electrode 27 may have a single-layer structure or a multilayer structure.

When the first outer electrode 27 has a single-layer structure, examples of the constituent material thereof include gold (Au), silver (Ag), copper (Cu), palladium (Pd), nickel (Ni), titanium (Ti), aluminum (Al), and an alloy containing at least one of these metals.

When the first outer electrode 27 has a multilayer structure, the first outer electrode 27 may include a seed layer 29a, a first plating layer 29b, and a second plating layer 29c in this order from the side close to the substrate 10 as illustrated in FIG. 1-2 and FIG. 1-3.

Examples of the seed layer 29a of the first outer electrode 27 include a multilayer body (Ti/Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu).

Examples of the constituent material of the first plating layer 29b of the first outer electrode 27 include nickel (Ni).

Examples of the constituent material of the second plating layer 29c of the first outer electrode 27 include gold (Au) and tin (Sn).

The second outer electrode 28 extends to the surface of the circuit layer 20 on the side opposite to the substrate 10 and is separated from the first outer electrode 27. That is, the second outer electrode 28 is positioned on the second electrode layer 24 on the side opposite to the substrate 10. Here, the second outer electrode 28 is electrically connected to the second electrode layer 24. More specifically, the openings respectively provided in the moisture-resistant protection layer 25 and the resin protection layer 26 are communicated with each other along the thickness direction T to extend, and the second outer electrode 28 is electrically connected to the second electrode layer 24 through the openings. The second outer electrode 28 is separated from the first electrode layer 22 in a plane along the length direction L and the thickness direction T (see FIG. 1-3), and thus the second outer electrode 28 is not electrically connected to the first electrode layer 22.

The second outer electrode 28 may have a single-layer structure or a multilayer structure.

When the second outer electrode 28 has a single-layer structure, examples of the constituent material thereof include gold (Au), silver (Ag), copper (Cu), palladium (Pd), nickel (Ni), titanium (Ti), aluminum (Al), and an alloy containing at least one of these metals.

When the second outer electrode 28 has a multilayer structure, the second outer electrode 28 may include a seed layer 29a, a first plating layer 29b, and a second plating layer 29c in this order from the side close to the substrate 10 as illustrated in FIG. 1-2 and FIG. 1-3.

Examples of the seed layer 29a of the second outer electrode 28 include a multilayer body (Ti/Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu).

Examples of the constituent material of the first plating layer 29b of the second outer electrode 28 include nickel (Ni).

Examples of the constituent material of the second plating layer 29c of the second outer electrode 28 include gold (Au) and tin (Sn).

The constituent material of the first outer electrode 27 and the constituent material of the second outer electrode 28 may be the same or different from each other.

As illustrated in FIG. 1-1, the first resin body 30 is provided between the end portion of the substrate 10 and the first outer electrode 27, and between the end portion of the substrate 10 and the second outer electrode 28 in plan view in the thickness direction T. Here, the first resin body 30 is provided on the surface of the circuit layer 20 on the side opposite to the substrate 10.

As illustrated in FIG. 1-2, in the thickness direction T, a leading end of the first resin body 30 on the side opposite to the substrate 10 is positioned higher than top ends of the first outer electrode 27 and the second outer electrode 28 on the side opposite to the substrate 10. More specifically, in the thickness direction T, the leading end of the first resin body 30 on the side opposite to the substrate 10 is positioned on the side opposite to the substrate 10 relative to a line segment (dotted line in FIG. 1-3) that connects the top ends of the first outer electrode 27 and the second outer electrode 28 on the side opposite to the substrate 10. In other words, the leading end of the first resin body 30 extends beyond the top ends of the first outer electrode 27 and the second outer electrode 28 in the thickness direction T.

The outermost surface of the second outer electrode 28 has an uneven shape in FIG. 1-2 and FIG. 1-3, and in this case, in the thickness direction T, a portion positioned furthest on the side opposite to the substrate 10 in the outermost surface of the second outer electrode 28 is defined as the top end of the second outer electrode 28 on the side opposite to the substrate 10. The same applies to the first outer electrode 27.

As illustrated in FIG. 1-2, in a sectional view in a direction perpendicular to the thickness direction T, a side surface of the first resin body 30 on a side close to the first outer electrode 27 or close to the second outer electrode 28 approaches a side surface of the first resin body 30 on a side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10. That is, a sectional shape of the first resin body 30 is a so-called tapered shape in which a width thereof decreases from the side close to the substrate 10 toward the side opposite to the substrate 10. The side surface of the first resin body 30 on the side close to the first outer electrode 27 or close to the second outer electrode 28 may have a curved shape as long as it approaches the side surface of the first resin body 30 on the side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10.

Furthermore, as illustrated in FIG. 1-2, in a sectional view in the direction perpendicular to the thickness direction T, the side surface of the first resin body 30 on the side close to the end portion of the substrate 10 rises steeply against the first main surface 10a of the substrate 10. Here, the leading end of the first resin body 30 on the side opposite to the substrate 10 has an acute angle. As illustrated in FIG. 1-2, the leading end of the first resin body 30 on the side opposite to the substrate 10 is preferably sharp.

Note that “rises steeply” as used herein means that the side surface of the first resin body 30 on the side close to the end portion of the substrate 10 rises perpendicularly (90°) against the first main surface 10a of the substrate 10, including inclined by about ±5° from perpendicularity (90°).

The leading end of the first resin body 30 on the side opposite to the substrate 10 need not have an acute angle or need not be sharp as long as the following condition is satisfied. In a sectional view in the direction perpendicular to the thickness direction T, the side surface of the first resin body 30 on the side close to the first outer electrode 27 or close to the second outer electrode 28 approaches the side surface of the first resin body 30 on the side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10, and the side surface of the first resin body 30 on the side close to the end portion of the substrate 10 rises steeply against the first main surface 10a of the substrate 10. For example, the first resin body 30 may have a shape with the leading end on the side opposite to the substrate 10 cut off, or may have a shape with the leading end rounded.

FIG. 2-1 is a schematic sectional view of a capacitor having a structure according to a preferred embodiment of the present invention illustrating a state in which a load is applied to the first resin body. FIG. 2-2 is a schematic sectional view of a capacitor having a structure in the past illustrating a state in which a load is applied to the first resin body.

Since the first resin body 30 protrudes from the circuit layer 20, when the capacitor 1 is mounted on a wiring substrate, for example, the first resin body 30 comes into contact with a side close to the wiring substrate (an upper surface of the wiring substrate, a land, solder, or the like, for example) before the first outer electrode 27 and the second outer electrode 28 come into contact with the side close to the wiring substrate. As a result, a load is applied to the first resin body 30, and the load applied to the first outer electrode 27 and the second outer electrode 28 is reduced. At this time, since the first resin body 30 has the tapered shape and the side surface of the first resin body 30 on the side close to the end portion of the substrate 10 rises steeply as indicated by a dotted line in FIG. 2-1, the first resin body 30 is laterally deformed toward a direction to the end surface of the substrate 10 (leftward in FIG. 2-1) in a process of pushing the capacitor element by a mounter. As a result, transferring the load to the dielectric layer 23 via the first resin body 30, the resin protection layer 26, and the moisture-resistant protection layer 25 is prevented in comparison with a case that the first resin body 30 having the shape in FIG. 2-2 is provided. Thus, breakage of the capacitor element, particularly breakage of the dielectric layer 23, is prevented. Such an effect is similarly obtained when the capacitor 1 is moved and placed on a flat plate with a side close to the circuit layer 20 as a bottom.

In the thickness direction T, a protruding measurement of the first resin body 30 relative to the circuit layer 20 is preferably 50 μm or less.

In FIG. 1-1, the first resin body 30 has a first outer peripheral portion 30a and a second outer peripheral portion 30b. The first outer peripheral portion 30a is provided along the end portion of the substrate 10 between the end portion of the substrate 10 and the first outer electrode 27 in plan view in the thickness direction T. The second outer peripheral portion 30b is provided along the end portion of the substrate 10 between the end portion of the substrate 10 and the second outer electrode 28 in plan view in the thickness direction T. Here, in plan view in the thickness direction T, the first outer peripheral portion 30a is provided outside the first outer electrode 27 along both ends of the substrate 10 extending in the length direction L, and the second outer peripheral portion 30b is provided outside the second outer electrode 28 along both ends of the substrate 10 extending in the length direction L.

FIG. 3 is a schematic plan view of the capacitor according to Embodiment 1 of the present invention illustrating a modification thereof.

In a capacitor 1A in FIG. 3, in plan view in the thickness direction T, a first outer peripheral portion 30a is provided outside the first outer electrode 27 along one end of the substrate 10 extending in the width direction W, and the second outer peripheral portion 30b is provided outside the second outer electrode 28 along the other end of the substrate 10 extending in the width direction W.

Alternatively, in plan view in the thickness direction T, the first outer peripheral portion 30a may be provided outside the first outer electrode 27 along both ends of the substrate 10 extending in the length direction L and along one end of the substrate 10 extending in the width direction W, and the second outer peripheral portion 30b may be provided outside the second outer electrode 28 along both ends of the substrate 10 extending in the length direction L and along the other end of the substrate 10 extending in the width direction W. In the case above, the portion extending along the length direction L of the substrate 10 and the portion extending along the width direction W of the substrate 10 may be connected to each other or may be separated from each other.

As described above, the first resin body 30 is preferably symmetrically provided in plan view in the thickness direction T. Since the first resin body 30 is symmetrically provided, when the capacitor 1 is mounted on a wiring substrate, for example, the substrate 10 and the circuit layer 20 may stably be held on the wiring substrate while the first resin body 30 receives a load. Such an effect is similarly obtained when the capacitor 1 is moved and placed on a flat plate with the side close to the circuit layer 20 as a bottom.

Indentation elastic modulus of the first resin body 30 is preferably lower than indentation elastic modulus of the dielectric layer 23. In the case above, flexibility of the first resin body 30 becomes higher than flexibility of the dielectric layer 23, and a load is easily received by the first resin body 30. Thus, the load applied to the capacitor element, in particular, to the dielectric layer 23 is sufficiently reduced. The indentation elastic modulus of the first resin body 30 is preferably 20 GPa or less.

The indentation elastic modulus is measured by a nanoindentation method, for example.

The Young's modulus of the first resin body 30 is preferably 20 GPa or less. In the case above, since the flexibility of the first resin body 30 is sufficiently high, a load is easily received by the first resin body 30, and thus the load applied to the capacitor element is sufficiently reduced. Further, the Young's modulus of the first resin body 30 is more preferably 0.5 GPa to 20 GPa.

The Young's modulus is measured by a tensile test method, for example.

The first resin body 30 preferably contains at least one resin selected from the group consisting of a resin in a solder resist, a polyimide resin, a polyimideamide resin, and an epoxy resin.

The first resin body 30 is preferably a cured product of a photosensitive resin.

The capacitor 1 in FIG. 1-1, FIG. 1-2, and FIG. 1-3, which is an example of the capacitor according to Embodiment 1 of the present invention, is manufactured by the following method, for example. FIG. 4-1, FIG. 4-2, FIG. 4-3, FIG. 4-4, FIG. 4-5, FIG. 4-6, FIG. 4-7, FIG. 4-8, FIG. 4-9, FIG. 4-10, and FIG. 4-11 each are a schematic sectional view for explaining an example of a method for manufacturing the capacitor according to Embodiment 1 of the present invention.

<Formation of Insulation Layer>

FIG. 4-1 is a schematic sectional view for explaining an example of a process of forming an insulation layer.

As illustrated in FIG. 4-1, the insulation layer 21 is formed on the first main surface 10a of the substrate 10 by a thermal oxidation method, a sputtering method, or a chemical vapor deposition method, for example.

<Formation of First Electrode Layer>

FIG. 4-2 is a schematic sectional view for explaining an example of a process of forming a first electrode layer.

A conductor layer made of the constituent material of the first electrode layer 22 is formed on the surface of the insulation layer 21 on the side opposite to the substrate 10 by a sputtering method, for example. Thereafter, the conductor layer is patterned to form the first electrode layer 22 as illustrated in FIG. 4-2 by a combination of a photolithography method and an etching method. More specifically, the first electrode layer 22 is formed inside a position separated from the end portion of the substrate 10.

<Formation of Dielectric Layer>

FIG. 4-3 is a schematic sectional view for explaining an example of a process of forming a dielectric layer.

A layer made of the constituent material of the dielectric layer 23 is formed so as to cover the first electrode layer 22 by a sputtering method or a chemical vapor deposition method, for example. Thereafter, the layer above is patterned to form the dielectric layer 23 as illustrated in FIG. 4-3 by a combination of a photolithography method and an etching method, for example. More specifically, the dielectric layer 23 is formed such that the opening for exposing part of the first electrode layer 22 is provided.

<Formation of Second Electrode Layer>

FIG. 4-4 is a schematic sectional view for explaining an example of a process of forming a second electrode layer.

A conductor layer made of the constituent material of the second electrode layer 24 is formed on a surface of a structural body illustrated in FIG. 4-3 on the side opposite to the substrate 10 by a sputtering method, for example. Thereafter, the conductor layer is patterned to form the second electrode layer 24 as illustrated in FIG. 4-4 by a combination of a photolithography method and an etching method, for example. More specifically, the second electrode layer 24 is formed so as to face the first electrode layer 22 with the dielectric layer 23 interposed therebetween.

<Formation of Moisture-Resistant Protection Layer>

FIG. 4-5 is a schematic sectional view for explaining an example of a process of forming a moisture-resistant protection layer.

A layer made of the constituent material of the moisture-resistant protection layer 25 is formed on a surface of a structural body illustrated in FIG. 4-4 on the side opposite to the substrate 10 by a chemical vapor deposition method, for example. Thereafter, the layer above is patterned to form the moisture-resistant protection layer 25 as illustrated in FIG. 4-5 by a combination of a photolithography method and an etching method, for example. More specifically, the moisture-resistant protection layer 25 is formed such that openings are provided at each of a position overlapping with the opening of the dielectric layer 23 for exposing part of the first electrode layer 22 and a position for exposing part of the second electrode layer 24.

<Formation of Resin Protection Layer>

FIG. 4-6 is a schematic sectional view for explaining an example of a process of forming a resin protection layer.

A layer made of the constituent material of the resin protection layer 26 is formed on a surface of a structural body illustrated in FIG. 4-5 on the side opposite to the substrate 10 by a spin coating method, for example. Thereafter, the resin protection layer 26 as illustrated in FIG. 4-6 is formed by patterning the layer above as follows, for example. When the constituent material of the resin protection layer 26 is photosensitive, only a photolithography method is used, and when the constituent material of the resin protection layer 26 is non-photosensitive, combination of a photolithography method and an etching method is employed. More specifically, the resin protection layer 26 is formed such that openings are provided at each of a position overlapping with the openings of the dielectric layer 23 and the moisture-resistant protection layer 25 for exposing part of the first electrode layer 22 and a position overlapping with the opening of the moisture-resistant protection layer 25 for exposing part of the second electrode layer 24.

<Formation of Outer Electrode>

FIG. 4-7 is a schematic sectional view for explaining an example of a process of forming a seed layer. FIG. 4-8 is a schematic sectional view for explaining an example of a process of forming a first plating layer and a second plating layer. FIG. 4-9 is a schematic sectional view for explaining an example of a process of removing part of the seed layer.

As illustrated in FIG. 4-7, the seed layer 29a is formed on a surface of a structural body illustrated in FIG. 4-6 on the side opposite to the substrate 10. The first plating layer 29b and the second plating layer 29c as illustrated in FIG. 4-8 are sequentially formed by combining a plating process and a photolithography method. Thereafter, as illustrated in FIG. 4-9, part of the seed layer 29a is removed by an etching method, for example. Thus, the second outer electrode 28 as illustrated in FIG. 4-9 is formed. The first outer electrode 27 illustrated in FIG. 1 to FIG. 3 is formed by a similar method. More specifically, the first outer electrode 27 is formed so as to be electrically connected to the first electrode layer 22 through the openings provided in each of the dielectric layer 23, the moisture-resistant protection layer 25, and the resin protection layer 26. Further, the second outer electrode 28 is formed so as to be electrically connected to the second electrode layer 24 through the openings provided in each of the moisture-resistant protection layer 25 and the resin protection layer 26.

Thus, the circuit layer 20 as illustrated in FIG. 4-9 is formed on the first main surface 10a of the substrate 10. As illustrated in FIG. 1-3, the first outer electrode 27 extends to the surface of the circuit layer 20 on the side opposite to the substrate 10, and is separated from the second outer electrode 28. Further, the second outer electrode 28 extends to the surface of the circuit layer 20 on the side opposite to the substrate 10 and is separated from the first outer electrode 27.

<Formation of First Resin Body>

FIG. 4-10 is a schematic sectional view for explaining an example of a process of forming a photosensitive resin film. FIG. 4-11 is a schematic sectional view for explaining an example of a process of forming a first resin body.

As illustrated in FIG. 4-10, a photosensitive resin film 35 is formed on the surface of the circuit layer 20 on the side opposite to the substrate 10. The first resin body 30 as illustrated in FIG. 4-11 is formed on the surface of the circuit layer 20 on the side opposite to the substrate 10 by patterning the photosensitive resin film 35 using a photolithography method. More specifically, the first resin body 30 is formed as follows. The first resin body 30 is provided between the end portion of the substrate 10 and the first outer electrode 27, and between the end portion of the substrate 10 and the second outer electrode 28 in plan view in the thickness direction T. In the thickness direction T, the leading end of the first resin body 30 on the side opposite to the substrate 10 is positioned higher than the top ends of the first outer electrode 27 and the second outer electrode 28 on the side opposite to the substrate 10. In a sectional view in the direction perpendicular to the thickness direction T, the side surface of the first resin body 30 on the side close to the first outer electrode 27 or close to the second outer electrode 28 approaches the side surface of the first resin body 30 on the side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10, and the side surface of the first resin body 30 on the side close to the end portion of the substrate 10 rises steeply against the first main surface 10a of the substrate 10.

The capacitor 1 is manufactured as described above.

Hereinbefore, a case in which one capacitor 1 is manufactured has been described, but a plurality of capacitors 1 may be manufactured at the same time by forming a plurality of circuit layers 20 on the first main surface 10a of the same substrate 10, and then cutting the substrate 10 into individual pieces with a dicing machine or the like.

The module according to the present invention includes the semiconductor device according to the present invention, and a wiring substrate having a first land electrically connected to the first outer electrode and a second land electrically connected to the second outer electrode. Hereinafter, a module including the capacitor according to Embodiment 1 of the present invention will be described as a module according to Embodiment 1 of the present invention.

FIG. 5 is a schematic sectional view of the module according to Embodiment 1 of the present invention.

As illustrated in FIG. 5, a module 100 includes the capacitor 1 and a wiring substrate 50. More specifically, in the module 100, the capacitor 1 is mounted on the wiring substrate 50.

The wiring substrate 50 includes a substrate 51, a first land 52, and a second land 53.

Various wiring lines are provided on the substrate 51. The various wiring lines of the substrate 51 are independently connected to the first land 52 and the second land 53.

The first land 52 is provided on a surface of the substrate 51 and is electrically connected to the first outer electrode 27. More specifically, the first land 52 is electrically connected to the first outer electrode 27 via a solder 60.

Examples of the constituent material of the first land 52 include a metal such as copper (Cu).

The second land 53 is provided at a position separated from the first land 52 on the surface of the substrate 51, and is electrically connected to the second outer electrode 28. More specifically, the second land 53 is electrically connected to the second outer electrode 28 via the solder 60.

Examples of the constituent material of the second land 53 include a metal such as copper (Cu).

Although not illustrated in FIG. 5, in the module 100, the first resin body 30 is not in contact with a side close to the wiring substrate 50 (first land 52, second land 53, solder 60, and the like, for example). This is considered to be due to the following mechanism, for example.

As a first mechanism, there will be described a case that the capacitor 1 is mounted on the wiring substrate 50 in a state of being not displaced. When the capacitor 1 is mounted on the wiring substrate 50 via the solder 60, firstly, the first resin body 30 comes into contact with the solder 60. Thereafter, when a reflow process is performed, although the solder 60 spreads out over each of the entire first land 52 and the entire second land 53, the solder 60 avoids the first resin body 30, and as a result, the first resin body 30 does not come into contact with the solder 60.

As a second mechanism, there will be described a case that the capacitor 1 is mounted on the wiring substrate 50 in a state of being displaced. In the case above, as a result, the first resin body 30 does not come into contact with the solder 60 due to the self-alignment effect during a reflow process.

In the module 100, as illustrated in FIG. 6, a mold resin 70 may be provided between the wiring substrate 50 and each of the first outer electrode 27 and the second outer electrode 28. FIG. 6 is a schematic sectional view illustrating a state that a mold resin is provided to the module according to Embodiment 1 of the present invention.

Embodiment 2

The capacitor according to Embodiment 1 of the present invention may further include a second resin body. In the case above, the second resin body is provided between the first outer electrode and the second outer electrode in plan view in the thickness direction, and a top end of the second resin body on a side opposite to a substrate is positioned higher than top ends of a first outer electrode and a second outer electrode on the side opposite to the substrate in the thickness direction. Such an example will be described below as a capacitor according to Embodiment 2 of the present invention.

FIG. 7-1 is a schematic plan view of the capacitor according to Embodiment 2 of the present invention illustrating an example thereof. FIG. 7-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 7-1.

A capacitor 2 illustrated in FIGS. 7-1 and 7-2 is provided with a second resin body 40 between the first outer electrode 27 and the second outer electrode 28 in plan view in the thickness direction T. More specifically, in plan view illustrated in FIG. 7-1, in the length direction L, the second resin body 40 is provided between a normal line extending along the width direction W from an end portion of the first outer electrode 27 on a side close to the second outer electrode 28 and a normal line extending along the width direction W from an end portion of the second outer electrode 28 on a side close to the first outer electrode 27. Here, the second resin body 40 is provided on the surface of the circuit layer 20 on the side opposite to the substrate 10.

As illustrated in FIG. 7-2, in the thickness direction T, a top end of the second resin body 40 on the side opposite to the substrate 10 is positioned higher than the top ends of the first outer electrode 27 and the second outer electrode 28 on the side opposite to the substrate 10.

The first resin body 30 and the second resin body 40 may be connected to each other or may be separated from each other.

Providing the second resin body 40 makes it possible to receive a load applied at the time of mounting not only by the first resin body 30 but also by the second resin body 40, and thus the load may be dispersed.

The constituent material of the second resin body 40 may be the same as the constituent material of the first resin body 30. Further, the second resin body 40 may be formed simultaneously with the first resin body 30.

In the thickness direction T, the top end of the second resin body 40 on the side opposite to the substrate 10 is preferably positioned higher than the leading end of the first resin body 30 on the side opposite to the substrate 10. With the configuration above, it is possible to shift the timing at which each resin body comes into contact with a wiring substrate or the like at the time of mounting, and thus a load applied to each resin body may be reduced.

It is preferable that the second resin body 40 be provided at a position surrounding a center of the substrate 10. As illustrated in FIGS. 7-1 and 7-2, the second resin body 40 preferably extends in a direction orthogonal to the thickness direction T, and in a direction from the second outer electrode 28 toward the first outer electrode 27, that is, a direction intersecting with the length direction L. More specifically, the second resin body 40 preferably extends in a direction orthogonal to both the length direction L and the thickness direction T, that is, in the width direction W.

In FIGS. 7-1 and 7-2, the second resin body 40 includes a first wall portion 40a provided on the side close to the first outer electrode 27, and a second wall portion 40b provided on the side close to the second outer electrode 28 and separated from the first wall portion 40a.

As illustrated in FIG. 7-1, it is preferable that the first wall portion 40a and the second wall portion 40b be provided in parallel. In the case above, when the capacitor 1 is mounted on a wiring substrate, for example, the substrate 10 and the circuit layer 20 may sufficiently stably be held on the wiring substrate by the second resin body 40. In particular, since the first wall portion 40a is provided on one side relative to the center of the substrate 10 in the length direction L and the second wall portion 40b is provided on the other side, the substrate 10 and the circuit layer 20 may more stably be held on the wiring substrate by the second resin body 40.

Embodiment 3

In the capacitor of Embodiment 1 or Embodiment 2 of the present invention, the first outer peripheral portion and the second outer peripheral portion of the first resin body may be continuously provided along the end portion of the substrate. Such an example will be described below as a capacitor according to Embodiment 3 of the present invention.

FIG. 8-1 is a schematic plan view of the capacitor according to Embodiment 3 of the present invention illustrating an example thereof. FIG. 8-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 8-1.

In a capacitor 3 illustrated in FIGS. 8-1 and 8-2, the first resin body 30 has a first outer peripheral portion 30a and a second outer peripheral portion 30b. In plan view in the thickness direction T, the first outer peripheral portion 30a is continuously provided along the end portion of the substrate 10 between the end portion of the substrate 10 and the first outer electrode 27. In plan view in the thickness direction T, the second outer peripheral portion 30b is continuously provided along the end portion of the substrate 10 between the end portion of the substrate 10 and the second outer electrode 28. More specifically, in plan view in the thickness direction T, the first outer peripheral portion 30a is provided outside the first outer electrode 27 along both ends of the substrate 10 extending in the length direction L and along one end of the substrate 10 extending in the width direction W, and a portion extending in the length direction L of the substrate 10 and a portion extending in the width direction W of the substrate 10 are connected to each other. Similarly, the second outer peripheral portion 30b is provided outside the second outer electrode 28 along both ends of the substrate 10 extending in the length direction L and along the other end of the substrate 10 extending in the width direction W, and a portion extending in the length direction L of the substrate 10 and a portion extending in the width direction W of the substrate 10 are connected to each other.

With the above-described configuration, at the time of mounting the capacitor 3 on a wiring substrate to form a module, when solder spreads out, that is, a so-called solder splash occurs, the first resin body 30 becomes a barrier. As a result, a short circuit of the first outer electrode 27 and the second outer electrode 28 due to a solder splash may be prevented.

The second resin body 40 may be provided between the first outer electrode 27 and the second outer electrode 28 in plan view in the thickness direction T, or it is acceptable that the second resin body 40 is not provided. When the second resin body 40 is provided, the first resin body 30 and the second resin body 40 may be connected to each other or may be separated from each other.

Embodiment 4

In the semiconductor device of the present invention, the first resin body may have a first corner portion, a second corner portion, a third corner portion, and a fourth corner portion provided at four corners of a substrate in plan view in the thickness direction. Such an example will be described below as a capacitor according to Embodiment 4 of the present invention.

FIG. 9-1 is a schematic plan view of the capacitor according to Embodiment 4 of the present invention illustrating an example thereof. FIG. 9-2 is a schematic sectional view of a portion corresponding to a line segment A1-A2 in FIG. 9-1.

In a capacitor 4 illustrated in FIG. 9-1 and FIG. 9-2, the first resin body 30 is provided at four corners of the substrate 10 in plan view in the thickness direction T. More specifically, in plan view in the thickness direction T, the first resin body 30 is provided at a position where a distance between all places of the uppermost surface of the first resin body 30 and a corner portion of a capacitor element (corner portion of the substrate 10) is shorter than the shortest distance between an end portion of the second electrode layer 24 and an outer periphery of the capacitor element (outer periphery of the substrate 10). That is, the first resin body 30 is provided in a range not exceeding a dotted line extending from the end portion of the second electrode layer 24 in plan view illustrated in FIG. 9-1. Here, the first resin body 30 is provided on the surface of the circuit layer 20 on the side opposite to the substrate 10.

As illustrated in FIG. 9-1, the first resin body 30 includes a first corner portion 31a, a second corner portion 31b, a third corner portion 31c, and a fourth corner portion 31d provided at the four corners of the substrate 10 in plan view in the thickness direction T. Each of the first corner portion 31a, the second corner portion 31b, the third corner portion 31c, and the fourth corner portion 31d has an oblique pyramid shape whose bottom surface is positioned on the side close to the substrate 10. Two side surfaces of the first corner portion 31a on the side close to the first outer electrode 27 (surfaces each indicated by a right-angled triangle in FIG. 9-1) each approach an opposing surface out of two side surfaces of the first corner portion 31a on the side close to the end portion of the substrate 10 (surfaces each overlapping with the end portion of the substrate 10 in FIG. 9-1), from the side close to the substrate 10 toward the side opposite to the substrate 10. Further, the two side surfaces of the first corner portion 31a on the side close to the end portion of the substrate 10 each rise steeply against the first main surface 10a of the substrate 10. The same applies to the second corner portion 31b. Two side surfaces of the third corner portion 31c on the side close to the second outer electrode 28 (surfaces each indicated by a right-angled triangle in FIG. 9-1) each approach an opposing surface out of two side surfaces of the third corner portion 31c on the side close to the end portion of the substrate 10 (surfaces each overlapping with the end portion of the substrate 10 in FIG. 9-1), from the side close to the substrate 10 toward the side opposite to the substrate 10. Further, the two side surfaces of the third corner portion 31c on the side close to the end portion of the substrate 10 each rise steeply against the first main surface 10a of the substrate 10. The same applies to the fourth corner portion 31d.

As illustrated in FIG. 9-1, in plan view in the thickness direction T, the first resin body 30 is preferably provided at a position that does not overlap with the first electrode layer 22.

Providing the first resin body 30 at the four corners of the substrate 10 increases a load per area applied to the first resin body 30, and thus the lateral deformation of the first resin body 30 described in FIG. 2-1 may further be promoted. As a result, breakage of the capacitor element, in particular, breakage of the dielectric layer 23 is further prevented.

Further, providing the first resin body 30 at the four corners of the substrate 10 makes a path, through which a mold resin is filled at the time of molding with a resin after mounting, be opened, and thus a filling failure may be prevented.

The second resin body 40 may be provided between the first outer electrode 27 and the second outer electrode 28 in plan view in the thickness direction T, or it is acceptable that the second resin body 40 is not provided.

Embodiment 5

The capacitor according to Embodiment 4 of the present invention may further include a third resin body. In the case above, the third resin body is provided between the first resin bodies in plan view in the thickness direction, and in the thickness direction, a leading end of the third resin body on the side opposite to the substrate is positioned higher than top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate. Such an example will be described below as a capacitor according to Embodiment 5 of the present invention.

FIG. 10-1 is a schematic plan view of the capacitor according to Embodiment 5 of the present invention illustrating an example thereof. FIG. 10-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 10-1.

In a capacitor 5 illustrated in FIG. 10-1 and FIG. 10-2, a third resin body 41 is provided between the first resin bodies 30 in plan view in the thickness direction T. More specifically, in plan view illustrated in FIG. 10-1, the third resin body 41 is provided between the first corner portion 31a and the second corner portion 31b, between the second corner portion 31b and the third corner portion 31c, between the third corner portion 31c and the fourth corner portion 31d, and between the fourth corner portion 31d and the first corner portion 31a. Here, the third resin body 41 is provided to the outer peripheral portion of the substrate 10 in plan view in the thickness direction T.

As illustrated in FIG. 10-2, in the thickness direction T, the leading end of the third resin body 41 on the side opposite to the substrate 10 is positioned higher than the top ends of the first outer electrode 27 and the second outer electrode 28 on the side opposite to the substrate 10.

Providing the third resin body 41 makes it possible to receive a load applied at the time of mounting not only by the first resin body 30 but also by the third resin body 41, and thus the load may be dispersed.

Further, even when a solder splash occurs at the time of mounting the capacitor 5 on a wiring substrate to form a module, the third resin body 41 becomes a barrier. As a result, a short circuit of the first outer electrode 27 and the second outer electrode 28 due to a solder splash may be prevented.

The constituent material of the third resin body 41 may be the same as the constituent material of the first resin body 30. The third resin body 41 may be formed at the same time as the first resin body 30.

It is preferable that the first resin body 30 and the third resin body 41 are separated from each other at bottom portions because a load at the time of mounting is not transferred from the first resin body 30 to the third resin body 41.

As illustrated in FIG. 10-2, in a sectional view in the direction perpendicular to the thickness direction T, a side surface of the third resin body 41 on the side close to the first outer electrode 27 or close to the second outer electrode 28 may approach a side surface of the third resin body 41 on the side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10. That is, a sectional shape of the third resin body 41 may be a so-called tapered shape in which a width thereof decreases from the side close to the substrate 10 toward the side opposite to the substrate 10. In the case above, the side surface of the third resin body 41 on the side close to the first outer electrode 27 or close to the second outer electrode 28 may have a curved shape as long as it approaches the side surface of the third resin body 41 on the side close to the end portion of the substrate 10, from the side close to the substrate 10 toward the side opposite to the substrate 10.

Furthermore, as illustrated in FIG. 10-2, in a sectional view in the direction perpendicular to the thickness direction T, the side surface of the third resin body 41 on the side close to the end portion of the substrate 10 may rise steeply against the first main surface 10a of the substrate 10. In the case above, the leading end of the third resin body 41 on the side opposite to the substrate 10 may have an acute angle. As illustrated in FIG. 10-2, the leading end of the third resin body 41 on the side opposite to the substrate 10 may be sharp.

In the thickness direction T, the leading end of the third resin body 41 on the side opposite to the substrate 10 is preferably positioned lower than the tip end of the first resin body 30 on the side opposite to the substrate 10. With the configuration above, it is possible to shift the timing at which each resin body comes into contact with the wiring substrate or the like at the time of mounting, and thus a load applied to each resin body may be reduced.

The second resin body 40 may be provided between the first outer electrode 27 and the second outer electrode 28 in plan view in the thickness direction T, or it is acceptable that the second resin body 40 is not provided. When the second resin body 40 is provided, the second resin body 40 and the third resin body 41 may be connected to each other or may be separated from each other.

When the second resin body 40 is provided between the first outer electrode 27 and the second outer electrode 28, in the thickness direction T, the top end of the second resin body 40 on the side opposite to the substrate 10 is preferably positioned higher than the tip end of the first resin body 30 on the side opposite to the substrate 10. With the configuration above, it is possible to shift the timing at which each resin body comes into contact with the wiring substrate or the like at the time of mounting, and thus a load applied to each resin body may be reduced.

FIG. 11-1 is a schematic plan view of the capacitor according to Embodiment 5 of the present invention illustrating a modification thereof. FIG. 11-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 11-1.

In a capacitor 5A illustrated in FIG. 11-1 and FIG. 11-2, in the thickness direction T, the top end of the second resin body 40 on the side opposite to the substrate 10 is positioned higher than the leading end of the third resin body 41 on the side opposite to the substrate 10.

Although not illustrated in FIG. 11-1 and FIG. 11-2, in the thickness direction T, the top end of the second resin body 40 on the side opposite to the substrate 10 is higher than the tip end of the first resin body 30 on the side opposite to the substrate 10, and the leading end of the third resin body 41 on the side opposite to the substrate 10 is lower than the tip end of the first resin body 30 on the side opposite to the substrate 10.

Embodiment 6

In the capacitor according to any one of Embodiment 1 to Embodiment 5 of the present invention, the circuit layer may further include a third electrode layer provided to face the first electrode layer and to be separated from the second electrode layer. Such an example will be described below as a capacitor according to Embodiment 6 of the present invention.

FIG. 12-1 is a schematic plan view of the capacitor according to Embodiment 6 of the present invention illustrating an example thereof. FIG. 12-2 is a schematic sectional view of a portion corresponding to a line segment D1-D2 in FIG. 12-1.

In a capacitor 6 illustrated in FIG. 12-1 and FIG. 12-2, the circuit layer 20 further includes a third electrode layer 24a.

The first outer electrode 27 extends to the surface of the circuit layer 20 on the side opposite to the substrate 10, and is separated from the second outer electrode 28. That is, the first outer electrode 27 is positioned on the third electrode layer 24a on the side opposite to the substrate 10. Here, the first outer electrode 27 is electrically connected to the third electrode layer 24a. More specifically, the openings respectively provided in the moisture-resistant protection layer 25 and the resin protection layer 26 are communicated with each other along the thickness direction T to extend, and the first outer electrode 27 is electrically connected to the third electrode layer 24a through the openings. The first outer electrode 27 is separated from the first electrode layer 22 in a plane along the length direction L and the thickness direction T (see FIG. 12-2), and thus the first outer electrode 27 is not electrically connected to the first electrode layer 22.

The third electrode layer 24a faces the first electrode layer 22, and is separated from the second electrode layer 24. More specifically, the third electrode layer 24a is provided on the surface of the dielectric layer 23 on the side opposite to the substrate 10, and faces the first electrode layer 22 with the dielectric layer 23 interposed therebetween.

Examples of the constituent material of the third electrode layer 24a include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), and titanium (Ti). The constituent material of the third electrode layer 24a may be an alloy containing at least one of the above-described metals, and specific examples thereof include an aluminum-silicon alloy (AlSi), an aluminum-copper alloy (AlCu), and an aluminum-silicon-copper alloy (AlSiCu).

The third electrode layer 24a may have a single-layer structure or a multilayer structure including a plurality of conductor layers made of the above-described material.

A measurement (thickness) of the third electrode layer 24a in the thickness direction T is preferably 0.3 μm to 10 μm, and more preferably 0.5 μm to 5 μm.

The first electrode layer 22, the dielectric layer 23, and the third electrode layer 24a constitute a capacitor element. More specifically, capacitance of the capacitor element is formed in a region where the first electrode layer 22, the dielectric layer 23, and the third electrode layer 24a overlap with each other.

In the configuration of the capacitor 6 illustrated in FIG. 12-1 and FIG. 12-2, the capacitor is formed on right and left sides, whereas in the configuration of the capacitor 1 illustrated in FIG. 1-1 and FIG. 1-2, the capacitor is formed on a left side. As a result, a capacitor having the same capacitance as that of the capacitor 1 may be formed with approximately one half of the thickness of the dielectric layer 23. The dielectric layer 23 of a capacitor having small capacitance, therefore, may be made thin, and the manufacturing cost may be reduced accordingly. Meanwhile, when the dielectric layer 23 becomes thin, breakage of the capacitor element tends to occur when a load is applied. However, making the first resin body 30 rise steeply enables to prevent breakage of the capacitor element.

OTHER EMBODIMENTS

The semiconductor device of the present invention is not limited to the above-described embodiments, and various applications and modifications can be made within the scope of the present invention with respect to the configuration, manufacturing conditions, and the like of the semiconductor device such as a capacitor.

REFERENCE SIGNS LIST

• • 1, 1A, 2, 3, 4, 5, 5A, 6 CAPACITOR (SEMICONDUCTOR DEVICE)
  • 10 SUBSTRATE
  • 10 a FIRST MAIN SURFACE OF SUBSTRATE
  • 10 b SECOND MAIN SURFACE OF SUBSTRATE
  • 20 CIRCUIT LAYER
  • 21 INSULATION LAYER
  • 22 FIRST ELECTRODE LAYER
  • 23 DIELECTRIC LAYER
  • 24 SECOND ELECTRODE LAYER
  • 24 a THIRD ELECTRODE LAYER
  • 25 MOISTURE-RESISTANT PROTECTION LAYER
  • 26 RESIN PROTECTION LAYER
  • 27 FIRST OUTER ELECTRODE
  • 28 SECOND OUTER ELECTRODE
  • 29 a SEED LAYER
  • 29 b FIRST PLATING LAYER
  • 29 c SECOND PLATING LAYER
  • 30 FIRST RESIN BODY
  • 30 a FIRST OUTER PERIPHERAL PORTION
  • 30 b SECOND OUTER PERIPHERAL PORTION
  • 31 a FIRST CORNER PORTION
  • 31 b SECOND CORNER PORTION
  • 31 c THIRD CORNER PORTION
  • 31 d FOURTH CORNER PORTION
  • 35 PHOTOSENSITIVE RESIN FILM
  • 40 SECOND RESIN BODY
  • 40 a FIRST WALL PORTION
  • 40 b SECOND WALL PORTION
  • 41 THIRD RESIN BODY
  • 50 WIRING SUBSTRATE
  • 51 SUBSTRATE
  • 52 FIRST LAND
  • 53 SECOND LAND
  • 60 SOLDER
  • 70 MOLD RESIN
  • 100 MODULE
  • L LENGTH DIRECTION
  • T THICKNESS DIRECTION
  • W WIDTH DIRECTION

Claims

1. A semiconductor device, comprising: a substrate having a first main surface and a second main surface opposite to each other in a thickness direction;a circuit layer on the first main surface of the substrate, wherein the circuit layer has a first electrode layer on a side thereof proximal to the substrate, a second electrode layer facing the first electrode layer, a dielectric layer between the first electrode layer and the second electrode layer in the thickness direction, a first outer electrode extending to a surface of the circuit layer on a side opposite to the substrate and a second outer electrode extending to the surface of the circuit layer on the side opposite to the substrate and separated from the first outer electrode; anda first resin body between an end portion of the substrate and the first outer electrode, and between the end portion of the substrate and the second outer electrode in a plan view in the thickness direction,in the thickness direction, a leading end of the first resin body on the side opposite to the substrate is positioned higher than top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate, andin a sectional view in a direction perpendicular to the thickness direction, a first side surface of the first resin body on a side close to the first outer electrode or close to the second outer electrode approaches a second side surface of the first resin body on a side close to the end portion of the substrate from the side close to the substrate toward the side opposite to the substrate, and the second side surface of the first resin body on the side close to the end portion of the substrate rises steeply against the first main surface of the substrate.

2. The semiconductor device according to claim 1, wherein in the sectional view in the direction perpendicular to the thickness direction, the leading end of the first resin body on the side opposite to the substrate has an acute angle.

3. The semiconductor device according to claim 1, further comprising a second resin body, wherein the second resin body is between the first outer electrode and the second outer electrode in the plan view in the thickness direction, andin the thickness direction, a top end of the second resin body on the side opposite to the substrate is positioned higher than the top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate.

4. The semiconductor device according to claim 3, wherein in the thickness direction, the top end of the second resin body on the side opposite to the substrate is positioned higher than the leading end of the first resin body on the side opposite to the substrate.

5. The semiconductor device according to claim 1, wherein the first resin body has a first outer peripheral portion along the end portion of the substrate and between the end portion of the substrate and the first outer electrode in the plan view in the thickness direction, and a second outer peripheral portion along the end portion of the substrate and between the end portion of the substrate and the second outer electrode in the plan view in the thickness direction.

6. The semiconductor device according to claim 1, wherein the first resin body has a first corner portion, a second corner portion, a third corner portion, and a fourth corner portion respectively at four corners of the substrate in the plan view in the thickness direction.

7. The semiconductor device according to claim 6, further comprising a third resin body between adjacent corner portions of the first corner portion, the second corner portion, the third corner portion, and the fourth corner portion in the plan view in the thickness direction, andin the thickness direction, a leading end of the third resin body on a side opposite to the substrate is positioned higher than the top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate.

8. The semiconductor device according to claim 7, wherein the leading end of the third resin body on the side opposite to the substrate is positioned lower than the top end of the first resin body on the side opposite to the substrate in the thickness direction.

9. The semiconductor device according to claim 1, wherein the first outer electrode is electrically connected to the first electrode layer, andthe second outer electrode is electrically connected to the second electrode layer.

10. The semiconductor device according to claim 1, wherein the circuit layer further includes a third electrode layer facing the first electrode layer and separated from the second electrode layer,the first outer electrode is electrically connected to the third electrode layer, andthe second outer electrode is electrically connected to the second electrode layer.

11. A module, comprising: the conductor device according to claim 1; anda wiring substrate having a first land electrically connected to the first outer electrode and a second land electrically connected to the second outer electrode.

12. The module according to claim 11, further comprising a mold resin between the wiring substrate and each of the first outer electrode and the second outer electrode.

13. The module according to claim 1, wherein in the thickness direction, a protruding measurement of the first resin body relative to the circuit layer is 50 μm or less.

14. The module according to claim 1, wherein an indentation elastic modulus of the first resin body is lower than an indentation elastic modulus of the dielectric layer.

15. The module according to claim 1, wherein a Young's modulus of the first resin body is 20 GPa or less.

16. The module according to claim 1, wherein the first resin body is a cured product of a photosensitive resin.