Semiconductor device and semiconductor device manufacturing method

Abstract

Provided is a technology capable of improving the productivity of a p channel MISFET using a high dielectric-constant film as a gate insulating film and a conductive film containing metal as a gate electrode. In this technology, a threshold voltage of the p channel MISFET can be decreased even if a work function value of the conductive film containing metal at the time of contacting a silicon oxide film is away from a value near a valence band of silicon. A p channel MISFET formed on a semiconductor substrate has a gate insulating film formed of a hafnium oxide film, a metal oxide film formed of an aluminum oxide film on this gate insulating film, and a gate electrode formed of a tantalum nitride film on this metal oxide film. The metal oxide film has a function to shift a work function value of the gate electrode.

Description

BRIEF DESCRIPTIONS OF THE DRAWINGS

FIG. 1 is a sectional view showing the structure of a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a graph showing a relation between a work function on a silicon oxide film and a work function on a hafnium oxide film or an aluminum oxide film;

FIG. 3 is a band diagram in the case where a gate insulating film and a gate electrode are brought into contact with each other;

FIG. 4 is a band diagram in the case where an aluminum oxide film is formed between the gate insulating film and the gate electrode;

FIG. 5 is a band diagram in the case where a hafnium oxide film is formed between the gate insulating film and the gate electrode;

FIG. 6 is a graph showing a relation between a gate voltage and mobility of carriers when a silicon oxide film, a hafnium oxide film, or a aluminum oxide film is used for a gate insulating film;

FIG. 7 is a graph showing a relation between a film thickness of the aluminum oxide film and an amount of shift of the work function;

FIG. 8 is a sectional view showing a semiconductor device manufacturing process according to the embodiment;

FIG. 9 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 8;

FIG. 10 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 9;

FIG. 11 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 10;

FIG. 12 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 11;

FIG. 13 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 12;

FIG. 14 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 13;

FIG. 15 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 14;

FIG. 16 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 15;

FIG. 17 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 16; and

FIG. 18 is a sectional view showing the semiconductor device manufacturing process continued from FIG. 17.

Claims

1. A semiconductor device having a p channel MISFET in a first region of a semiconductor substrate and an n channel MISFET in a second region of the semiconductor substrate, wherein the p channel MISFET comprises:(a) a gate insulating film which is formed on the semiconductor substrate and is formed of a high dielectric-constant film with a dielectric constant higher than that of a silicon oxide film;(b) an insulating metal oxide film which is formed on the gate insulating film and generates a dipole; and(c) a gate electrode which is formed on the metal oxide film.

2. The semiconductor device according to claim 1, wherein the gate electrode is formed of a conductive film containing metal.

3. The semiconductor device according to claim 2, wherein the gate electrode is formed of any one of a TaN film, a TiN film, a TaSiN film, a TiAlN film, an HfN film, an NixSi1-x film, a PtSi film, an NixTa1-xSi film, an NixPt1-xSi film, an HfSi film, a WSi film, an IrxSi1-x film, a TaGe film, a TaCx film, an Mo film, and a W film.

4. The semiconductor device according to claim 2, wherein the gate electrode is formed of the conductive film having a work function value of 4.4 eV to 4.9 eV at the time of contacting a silicon oxide film.

5. The semiconductor device according to claim 1, wherein the metal oxide film is formed of any one of an aluminum oxide film, a tantalum oxide film, a titanium oxide film, a lanthanum oxide film, and a rare-earth oxide film.

6. The semiconductor device according to claim 1, wherein the metal oxide film is formed of an aluminum oxide film and has a film thickness of 3 angstrom or more and 12 angstrom or less.

7. The semiconductor device according to claim 1, wherein the gate insulating film is formed of any one of a hafnium oxide film, a hafnium silicate film, a hafnium silicon oxynitride film, an aluminum oxide film, and an aluminum oxide oxynitride film.

8. The semiconductor device according to claim 1, wherein the gate electrode has a work function value higher than a work function value when the gate electrode is formed on the gate insulating film without forming the metal oxide film.

9. The semiconductor device according to claim 1, wherein the metal oxide film has a function to shift a work function value of the gate electrode.

10. A semiconductor device having a p channel MISFET in a first region of a semiconductor substrate and an n channel MISFET in a second region of the semiconductor substrate, wherein the p channel MISFET comprises:(a) a first gate insulating film which is formed on the semiconductor substrate and is formed of a high dielectric-constant film with a dielectric constant higher than that of a silicon oxide film;(b) an insulating metal oxide film which is formed on the first gate insulating film and generates a dipole; and(c) a first gate electrode which is formed on the metal oxide film, andthe n channel MISFET comprises:(d) a second gate insulating film which is formed on the semiconductor substrate and is formed of a high dielectric-constant film with a dielectric constant higher than that of a silicon oxide film; and(e) a second gate electrode which is formed on the second gate insulating film.

11. A semiconductor device manufacturing method in which a p channel MISFET is formed in a first region of a semiconductor substrate and an n channel MISFET is formed in a second region of the semiconductor substrate, the method comprising the steps of: (a) forming a high dielectric-constant film with a dielectric constant higher than that of a silicon oxide film in the first region and the second region of the semiconductor substrate;(b) forming a second conductive film containing metal on the high dielectric-constant film formed in the first region and the second region;(c) removing the second conductive film formed in the first region;(d) forming an insulating metal oxide film in the first region and the second region;(e) performing a heat treatment to the semiconductor substrate;(f) forming a first conductive film containing metal on the metal oxide film formed in the first region and the second region;(g) removing the metal oxide film and the first conductive film formed in the second region and processing the high dielectric-constant film, the metal oxide film, and the first conductive film formed in the first region, thereby forming a first gate insulating film made of the high dielectric-constant film and a first gate electrode made of the first conductive film in the first region; and(h) processing the high dielectric-constant film and the second conductive film formed in the second region, thereby forming a second gate insulating film made of the high dielectric-constant film and a second gate electrode made of the second conductive film in the second region.

12. The semiconductor device manufacturing method according to claim 11, wherein the (e) step is performed after the (d) step and before the (f) step.

13. The semiconductor device manufacturing method according to claim 11, wherein the metal oxide film is formed of any one of an aluminum oxide film, a tantalum oxide film, a titanium oxide film, a lanthanum oxide film, and a rare-earth oxide film.

14. The semiconductor device manufacturing method according to claim 11, wherein the first conductive film is formed of any one of a TaN film, a TiN film, a TaSiN film, a TiAlN film, an HfN film, an NixSi1-x film, a PtSi film, an NixTa1-xSi film, an NixPt1-xSi film, an HfSi film, a WSi film, an IrxSi1-x film, a TaGe film, a TaCx film, an Mo film, and a W film.

15. The semiconductor device manufacturing method according to claim 14, wherein the second conductive film is formed of any one of an Hf film, a Ta film, an Mn film, a Y film, an La film, an Ln film, a YbSi film, a TaSi film, an ErSi film, an NixYb1-xSi film, and an ErGe film.