Claims
- 1. A method for fabricating a semiconductor device having reduced field oxide recess, comprising the steps of:(a) performing an HF dip process on a substrate after field oxidation and without performing a sacrificial oxidation; (b) performing a select gate oxidation; (c) performing an implant subsequent to the HF dip and the select gate oxidation; (d) depositing a tunnel oxide mask; (e) performing an etch to remove the select gate oxide uncovered by the mask; and performing a tunnel oxidation.
- 2. The method of claim 1 , further including the step of performing steps (a)-(f) in a select gate region of a flash memory array.
- 3. The method of claim 2 wherein step (a) further includes the step of:(i) performing the HF dip for a time necessary to remove approximately 70 angstroms of material.
CROSS-REFERENCE TO RELATED APPLICATION
This application is claiming under 35 USC 120 the benefit of provisional patent application serial No. 60/169,187 filed on Dec. 6, 1999.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
5661072 |
Jeng |
Aug 1997 |
A |
5821153 |
Tsai et al. |
Oct 1998 |
A |
6054366 |
Yamagishi et al. |
Apr 2000 |
A |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/169187 |
Dec 1999 |
US |