BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a flow chart illustrating the procedure of a first experiment.
FIGS. 2A and 2B are a graph and a table showing B concentration profiles obtained by SIMS measurements of the first experiment.
FIG. 3 is a graph showing sheet resistances of B doped regions obtained by the first experiment.
FIG. 4 is a flow chart illustrating the procedure of a second experiment.
FIGS. 5A and 5B are a graph and a table showing B concentration profiles obtained by SIMS measurements of the second experiment.
FIGS. 6A to 6J are schematic cross sectional views illustrating the processes of a CMOS semiconductor device manufacture method according to a first embodiment.
FIG. 7 is a graph showing the transistor characteristics of samples manufactured by the method of the first embodiment and comparative samples.
FIGS. 8A to 8H are schematic cross sectional views illustrating the processes of a CMOS semiconductor device manufacture method according to a second embodiment.
FIG. 9 is a graph showing the transistor characteristics of samples manufactured by the method of the second embodiment and comparative samples.