Claims
- 1. A semiconductor device comprising:
- a single crystal substrate;
- a nucleus formation buffer layer formed on said single crystal substrate; and
- a lamination layer including a plurality of Al.sub.1-x-y Ga.sub.x In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, x+y.ltoreq.1) layers laminated above said nucleus formation buffer layer,
- wherein said nucleus formation buffer layer is formed of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1) and formed on a surface of said substrate with an average film thickness of 5 nm to 20 nm such that said nucleus formation buffer layer has a number of pinholes for control of polarity and formation of nuclei, said pinholes being formed among loosely formed small crystals of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1).
- 2. The semiconductor device according to claim 1, wherein said Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1), of which said nucleus formation buffer layer is formed, is Al.sub.1-s Ga.sub.s N (0.ltoreq.s.ltoreq.1).
- 3. The semiconductor device according to claim 1, wherein said Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1), of which said nucleus formation buffer layer is formed, is GaN.
- 4. The semiconductor device according to claim 1, wherein said nucleus formation buffer layer is formed in an atmosphere containing ammonia supplied at a flow rate of 1/200 to 1/50 of a total flow rate of material gases.
- 5. The semiconductor device according to claim 1, wherein a temperature raising process from the completion of formation of said nucleus formation buffer layer to the beginning of formation of said lamination layer is performed in an ammonia-free atmosphere.
- 6. The semiconductor device according to claim 1, wherein said lamination layer is formed in an atmosphere at 70 Torr or less.
- 7. The semiconductor device according to claim 1, wherein said single crystal substrate is formed of sapphire.
- 8. The semiconductor device according to claim 7, wherein a face to be processed of said single crystal substrate is a c face of said sapphire substrate.
- 9. The semiconductor device according to claim 7, wherein a face to be processed of said single crystal substrate is inclined by 0.5 to 10 degrees from a c face toward an a face of said sapphire substrate.
- 10. The semiconductor device according to claim 1, wherein said lamination layer constitutes a light emitting diode of a double hetero structure wherein an active layer is sandwiched between a p-type cladding layer and an n-type cladding layer.
- 11. The semiconductor device according to claim 1, further comprising a distortion reducing buffer layer formed of Al.sub.1-u-v Ga.sub.u In.sub.v N (0.ltoreq.u.ltoreq.1, 0.ltoreq.v.ltoreq.1, u+v.ltoreq.1) on said nuclei formation buffer layer, a thickness of said distortion reducing buffer layer being greater than that of said nuclei formation buffer layer.
- 12. The semiconductor device according to claim 11, wherein said distortion reducing buffer layer is grown at temperatures between 350.degree. C. and 800.degree. C.
- 13. The semiconductor device according to claim 11, wherein said Al.sub.1-u-v Ga.sub.u In.sub.v N (0.ltoreq.u.ltoreq.1, 0.ltoreq.v.ltoreq.1, u+v.ltoreq.1), of which said distortion reducing buffer layer is formed, is Ga.sub.1-v In.sub.v N (0.ltoreq.v.ltoreq.1).
- 14. The semiconductor device according to claim 11, further comprising a cap layer, provided on said distortion reducing buffer layer, for preventing evaporation of In contained in said thermal distortion reducing buffer layer.
- 15. A semiconductor laser comprising:
- a single crystal substrate;
- a first layer made of a single crystal and formed on said single crystal substrate; and
- a lamination layer including a plurality of Al.sub.1-x-y Ga.sub.x In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, x+y.ltoreq.1) layers laminated above said first layer,
- wherein said first layer is formed of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1) and formed on a surface of said substrate with an average film thickness of 5 nm to 20 nm such that said first layer has a number of pinholes formed among Al.sub.1-s-t)Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1).
Priority Claims (2)
Number |
Date |
Country |
Kind |
6-038157 |
Mar 1994 |
JPX |
|
7-000704 |
Jan 1995 |
JPX |
|
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation-in-part of U.S. patent application Ser. No. 08/400,865 filed Mar. 8, 1995 now U.S. Pat. No. 5,656,832.
US Referenced Citations (8)
Non-Patent Literature Citations (2)
Entry |
Kamp et al Mat. Res. Soc. Symp. Proceed. vol. 395 "GaN in Materials" "NH.sub.3 in GaN" pp. 135-139, Dec. 1995. |
Van der Stricht et al Mat. Res. Soc. Symp. proceed. vol. 395 "GaN in Materials" "The Effect of a GaN . . . Deposition" pp. 231-236, Dec. 1995. |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
400865 |
Mar 1995 |
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