The present invention relates generally to semiconductors, and more particularly to a semiconductor device with ohmic contact and method of making the same.
Heterojunction bipolar transistors (HBTs) are widely used in high speed and high frequency applications. The heterojunction bipolar transistor (HBT) offers much higher speeds of operation than the more prevalent metal-oxide-semiconductor field-effect transistors (MOSFETS) or even conventional homojunction bipolar transistors, such as npn or pnp silicon transistors. The HBT offers an alternative technology to metal semiconductor field effect transistors (MESFETs) and high electron mobility transistors (HEMTs) when a high degree of linearity is desirable. The use of different materials of differing bandgaps for the collector, base and emitter provides for additional design flexibility. The HBT is a layered structure that includes a semiconductor substrate, a subcollector, a collector, a base and an emitter stacked one on top the other in an integral assembly. Metal contacts are formed to connect power and other circuitry to the emitter, the base and the subcollector.
Emitter contact resistance is very important to HBT performance, such that the lower the emitter contact resistance the better the performance. One type of low resistance n-type emitter contact is formed from subsequent layers of titanium (Ti), platinum (Pt) and gold (Au). However, the gold will diffuse into the semiconductor through the platinum and titanium over time causing reliability issues. Another type of low resistance n-type emitter contact is formed from subsequent layers of alloyed germanium (Ge), gold (Au) and nickel (Ni). However, the germanium and gold will react over time with the semiconductor causing uncontrolled metal diffusion resulting in reliability issues.
Platinum (Pt) has been used to form a reactive layer with p-type GaAs to form p-Ohmic base contact on Gallium Arsenide (GaAs) based heterojunction bipolar transistors (HBTs), which has shown to be a stable compound that would prevent further diffusion of additional metal stacked above the platinum (Pt)/Gallium Arsenide (GaAs) alloy. However, the platinum (Pt) has a workfunction of ˜4.6 eV, which allows an energy band alignment that is suitable for low resistance p-Ohmic contact on Gallium Arsenide (GaAs), which has an electron affinity value of ˜4.1 eV. Due to the high energy workfunction of the platinum (Pt) contact, it is commonly used to form the Schottky contact on n-type Gallium Arsenide (GaAs) based devices.
In one aspect of the invention, a method is provided for fabricating a semiconductor device. The method comprises providing a semiconductor structure with a N-type doped semiconductor contact layer, forming a platinum contact portion over the N-type doped semiconductor contact layer, forming an adhesive contact portion over the platinum contact portion, forming a barrier contact portion over the adhesive contact portion, and forming a gold contact portion over the barrier contact portion. The method further comprises annealing the semiconductor structure to alloy the platinum contact portion with the N-type doped semiconductor contact layer to form a platinum/semiconductor alloyed diffusion contact barrier substantially disposed within the N-type doped semiconductor contact layer.
In another aspect of the invention, a method is provided for fabricating an Indium Phosphide (InP) based heterojunction bipolar transistor (HBT) device. The method comprises providing a HBT device with a N-type doped emitter contact layer, forming a first platinum contact portion over the N-type doped emitter contact layer, forming a titanium contact portion over the first platinum contact portion, forming a second platinum contact portion over the titanium contact portion, and forming a gold contact portion over the barrier contact portion. The method further comprises annealing the HBT at a temperature of about 200° C. to about 300° C. for about 15 minutes to about 60 minutes to alloy the first platinum contact portion with the N-type doped emitter contact layer to form a platinum/semiconductor alloyed diffusion contact barrier substantially disposed within the emitter contact layer.
In yet another aspect of the invention, an Indium Phosphide (InP) based heterojunction bipolar transistor (HBT) device is provided. The HBT device comprises a N-type doped emitter contact layer, a platinum/semiconductor alloyed diffusion contact barrier substantially disposed within the N-type emitter contact layer, an adhesive contact portion overlying the platinum/semiconductor alloyed diffusion contact barrier, a barrier contact portion overlying the adhesive contact portion and a gold contact portion overlying the barrier contact portion.
The present invention relates to an ohmic contact for an N-type doped semiconductor contact layer. The ohmic contact can be employed on a HBT device to facilitate the reduction of contact resistance and to increase reliability by mitigating diffusion of portions of the contact into the N-typed doped semiconductor. The ohmic contact employs a platinum/semiconductor alloyed diffusion contact barrier substantially disposed within the N-type doped semiconductor to mitigate diffusion of overlying contact portions of the ohmic contact into the N-type doped semiconductor. The platinum/semiconductor alloyed diffusion contact barrier can be formed by providing a platinum contact portion over the N-typed doped semiconductor and annealing the HBT device to diffuse the platinum into the N-type semiconductor to form the platinum/semiconductor alloyed diffusion contact barrier. The ohmic contact can further include an adhesive contact portion overlying the platinum/semiconductor alloyed diffusion barrier, a barrier contact portion overlying the adhesive contact portion and a gold contact portion overlying the barrier contact portion. The ohmic contact provides a very low resistance contact that is substantially unaffected by contamination and protects against contact diffusion facilitating longevity and reliability.
The emitter portion 19 includes a first emitter layer 20 overlying the base layer 18, a second emitter layer 22 overlying the first emitter layer 20 and an emitter contact layer 24 overlying the second emitter layer 22. The first emitter layer 20 can be formed of lightly doped n− Indium Aluminum Arsenide (InAlAs) or InP and the second emitter layer 22 can be formed of heavily doped n+ InAlAs or InP. The emitter contact layer 24 is coupled to an emitter contact 34 and can be formed of heavily doped n+ InGaAs. The emitter contact 34 includes a platinum/semiconductor alloyed diffusion contact barrier 26 that is disposed substantially within the emitter contact portion 24 and has a thickness of about 50 Å to about 200 Å. The platinum/semiconductor alloyed diffusion contact barrier 26 can be formed by providing a platinum contact portion overlying the emitter contact portion 24 and annealing the HBT device 10 to alloy the platinum with the semiconductor of the emitter contact layer 24. The HBT device 10 can be annealed by placing the HBT device 10 on a hot plate and heating the HBT device 10 at about 200° C. to about 300° C. for about 15 minutes to about 60 minutes. In one aspect of the invention, the HBT device 10 is heated at about 260° C. for about 15 minutes. The platinum contact portion can have a thickness of about 30 Å to about 120 Å and diffuse within the emitter contact portion 24 to about 1.7 times its original thickness during the annealing process.
The emitter contact 34 also includes an adhesive contact portion 28 overlying the platinum/semiconductor alloyed diffusion contact barrier 26. The adhesive contact portion 28 could be formed of titanium and have a thickness of about 200 Å to about 500 Å. Alternatively, the adhesive contact portion 28 could be silicon, chromium or other elements or compounds that provide or promote layer adhesion. The emitter contact 34 also includes a barrier contact portion 30 overlying the adhesive contact portion 28. The barrier contact portion 30 can be formed of platinum and have a thickness of about 200 Å to about 1000 Å. Alternatively, the barrier contact portion 30 could be formed of other elements or compounds that provide or promote diffusion of a gold contact portion 32 overlying the barrier contact portion 30. The gold contact portion 32 has a thickness of about 1000 Å to about 5000 Å.
Turning now to
As previously stated, the collector portion 15 includes a subcollector layer 14 overlying the InP substrate 12 and a collector layer 16 overlying the subcollector layer 14. The subcollector layer 14 is coupled to the collector contact 38 and can be heavily doped n+ Indium Gallium Arsenide (InGaAs). The collector layer 16 can be lightly doped n− InGaAs or InP. The base portion 17 includes the base layer 18 overlying the collector layer 16. The base layer 18 is coupled to the base contact 36 and can be heavily doped p+InGaAs or Gallium Arsenide Antimonide (GaAsSb). The emitter portion 19 includes the first emitter layer 20 overlying the base layer 18, the second emitter layer 22 overlying the first emitter layer 20 and the emitter contact layer 24 overlying the second emitter layer 22. The first emitter layer 20 can be formed of lightly doped n− Indium Aluminum Arsenide InAlAs or InP and the second emitter layer 22 can be formed of heavily doped n+ InAlAs or InP. The emitter contact layer 24 can be formed of heavily doped n+ InGaAs.
The HBT structure 11 of
What has been described above includes exemplary implementations of the present invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the present invention, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present invention are possible. Accordingly, the present invention is intended to embrace all such alterations, modifications and variations.