Patent Application
20090108410
This application claims priority under 35 U.S.C. §119 on Patent Application No. 2007-283733 filed in Japan on Oct. 31, 2007 and Patent Application No. 2008-87906 filed in Japan on Mar. 28, 2008, the entire contents of which are hereby incorporated by reference.
1. Field of the Invention
The invention relates to a semiconductor device having a multilayer interconnect structure.
2. Background Art
In a semiconductor device having a multilayer interconnect structure, interconnect layers are generally formed by embedding a metal film in grooves formed in an interlayer insulating film of each interconnect layer (a damascene method). In the damascene method, grooves are formed in a semiconductor substrate, and a metal film is then deposited on the whole surface of the semiconductor substrate. An unnecessary metal film is removed by, e.g., a Chemical Mechanical Polishing (CMP) method so that the metal film is left only in the grooves. In the CMP method used in the damascene method, the polishing rate varies depending on the interconnect pattern or the like to be formed in an interlayer insulating film. More specifically, the polishing rate is higher in a region of a sparse interconnect pattern or the like than in a region of a dense interconnect pattern or the like. Therefore, the film thickness is smaller in the region of a sparse interconnect pattern or the like than in the region of a dense interconnect pattern or the like. Preventing such variation in interconnect film thickness due to the difference in polishing rate is important to suppress variation in final interconnect film thickness. A method of providing a pseudo interconnect pattern as a dummy pattern in the region of a sparse interconnect pattern or the like is used to prevent such variation in interconnect film thickness. Uneven polishing of patterns (dishing) in the CMP process can be prevented by this method.
For example, Japanese Laid-Open Patent Publication No. 2004-235357 describes a semiconductor device that has a uniform dummy pattern in a scribe region and circuit regions of a semiconductor substrate in order to prevent dishing in a CMP process.
As shown in
As shown in
Japanese Laid-Open Patent Publication No. 2007-48995 describes a method for preventing generation of chippings in a dicing process. In this method, a peeling prevention groove is formed by emitting laser light on both sides of, and at a distance from, a dicing line on a semiconductor wafer.
This Publication mentions formation of a dummy pattern for preventing dishing and the process of forming a peeling prevention groove by laser light, but does not mention the relation among a diffusion layer conductive film that is formed in a scribe region, arrangement of an interconnect dummy pattern, and a laser grooving method. In the laser grooving method, when laser light transmits to a diffusion layer, the laser light is absorbed by a diffusion layer conductive film formed in the diffusion layer, causing melting and volume expansion of the diffusion layer conductive film. As a result, an interlayer insulating film is peeled in a wide range on the diffusion layer conductive film. Such peeling causes problems such as water entering chips, and chippings are also produced from the peeled part in a dicing process performed after the laser grooving process. As a result, the semiconductor device is degraded in quality and reliability.
In view of the above problems, it is an object of the invention to prevent defects from being generated by chippings that are produced in a dicing process of a semiconductor substrate (wafer) by a laser grooving method.
In order to achieve the above object, in a semiconductor device of the invention, no diffusion layer conductive film is formed in a region to which laser light is emitted in a dicing process or the like in a scribe region. In the case where the diffusion layer conductive film is formed in the scribe region, a dummy pattern is formed in an interlayer insulating film so that laser light is not emitted to the diffusion layer.
More specifically, a semiconductor device according to a first aspect of the invention includes: a semiconductor substrate; a diffusion layer conductive film formed on the semiconductor substrate; an interlayer insulating film layered on the semiconductor substrate; an interconnect pattern and a via pattern formed in the interlayer insulating film; a plurality of circuit regions formed in the semiconductor substrate; and a scribe region formed around the circuit regions and separating the circuit regions from each other. The diffusion layer conductive film is not formed at least in a region to which laser light is emitted in the scribe region.
In the semiconductor device of the first aspect of the invention, the diffusion layer conductive film is not formed in the region to which laser light is emitted in a laser grooving process of the scribe region. Therefore, laser light is not absorbed by the diffusion layer conductive film, and melting and volume expansion of the diffusion layer conductive film do not occur, whereby peeling of the interlayer insulating film can be prevented. As a result, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
In the semiconductor device of the first aspect of the invention, it is preferable that the diffusion layer conductive film is not formed in the scribe region.
In the semiconductor device of the first aspect of the invention, it is preferable that the interconnect pattern and the via pattern are not formed in the scribe region.
In this structure, the scribe region to which laser light is emitted does not have any material that absorbs laser light. Therefore, the interlayer insulating film can be uniformly melted by laser light, whereby peeling of the interlayer insulating film can be prevented.
In the semiconductor device of the first aspect of the invention, it is preferable that the interconnect pattern or the via pattern is formed in the scribe region other than a region around a center line of the scribe region, and the interconnect pattern or the via pattern formed in the scribe region has an increased distance across the region around the center line toward a top layer of the interlayer insulating film.
In this structure, the diffusion layer conductive film and the conductive members such as an interconnect pattern and a via pattern are not formed in a region to which laser light is emitted in a laser grooving process in the scribe region. Therefore, the region to which laser light is emitted does not have any material that absorbs laser light. Accordingly, the interlayer insulating film can be uniformly melted by laser light, whereby peeling of the interlayer insulating film can be prevented. An interconnect pattern or a via pattern is formed in the scribe region other than the region to which laser light is emitted. Therefore, dishing can be prevented in a CMP process.
A semiconductor device according to a second aspect of the invention includes: a semiconductor substrate; a diffusion layer conductive film formed on the semiconductor substrate; a plurality of interlayer insulating films layered on the semiconductor substrate; an interconnect pattern and a via pattern formed in the interlayer insulating films; a plurality of circuit regions formed in the semiconductor substrate; and a scribe region formed around the circuit regions and separating the circuit regions from each other. At least a region to which laser light is emitted in the scribe region is covered by the interconnect patterns or the via patterns respectively formed in a plurality of interlayer insulating films, when viewed two-dimensionally.
In the semiconductor device of the second aspect of the invention, laser light is first absorbed by the interconnect pattern or the via pattern in a laser grooving process. As the laser light is absorbed by the interconnect pattern or the via pattern, heat is generated and the interlayer insulating film is melted. More specifically, an upper layer of the interlayer insulating film is first melted and the melted part is removed by sublimation. The melted part continuously expands in the interlayer insulating film. As a result, the interlayer insulating film can be uniformly melted and removed by laser light in a wide range of the scribe region. Even when a diffusion layer conductive film is formed in the scribe region to which laser light is emitted, the laser light is blocked by the interconnect pattern or the via pattern formed in the interlayer insulating film on the diffusion layer conductive film. Accordingly, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
In the semiconductor device of the second aspect of the invention, it is preferable that the scribe region is entirely covered by the interconnect patterns or the via patterns respectively formed in the plurality of interlayer insulating films, when viewed two-dimensionally.
In the semiconductor device of the second aspect of the invention, the diffusion layer conductive film may be formed in the scribe region.
In this structure, laser light in a laser grooving process is absorbed by the interconnect pattern or the via pattern formed in the interlayer insulating film on the diffusion layer conductive film, and the laser light is thus blocked by the interconnect pattern or the via pattern. Therefore, laser light is not absorbed by the diffusion layer conductive film, and melting and volume expansion of the diffusion layer conductive film do not occur, whereby peeling of the interlayer insulating film can be prevented. As a result, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
In the semiconductor device of the second aspect of the invention, it is preferable that the interconnect patterns respectively formed in the plurality of interlayer insulating films in the scribe region overlap each other at least at their respective ends, when viewed two-dimensionally.
In this structure, the amount of a conductive material that forms the interconnect patterns can be reduced, and the quantity of laser light in a laser grooving process can be relatively reduced. As a result, stable operation can be implemented.
In the semiconductor device of the second aspect of the invention, it is preferable that the interconnect patterns respectively formed in the plurality of interlayer insulating films in the scribe region have their respective edges aligned each other, when viewed two-dimensionally.
In this structure, the amount of the conductive material that forms the interconnect patterns can further be reduced, and the quantity of laser light in a laser grooving process can be relatively reduced. As a result, stable operation can be implemented.
In the semiconductor device of the second aspect of the invention, it is preferable that the interconnect pattern formed in the scribe region is formed in upper two or more of the plurality of interlayer insulating films.
In this structure, the amount of the conductive material that forms the interconnect patterns can be reduced, and the quantity of laser light in a laser grooving process can be relatively reduced. As a result, stable operation can be implemented. Moreover, the conductive material is not melted in the lower ones of the plurality of interlayer insulating films. Therefore, the interlayer insulating film can be uniformly melted and removed by laser light in a wide range of the scribe region.
In the semiconductor device of the second aspect of the invention, it is preferable that the interconnect pattern formed in the scribe region is formed in lower two or more of the plurality of interlayer insulating films.
In this structure, a finer interconnect pattern can be formed than in the case where the interconnect pattern is formed in upper ones of the plurality of first interlayer insulating films. Therefore, heat generation and melting of the interlayer insulating film can be more uniformly caused by laser light. Accordingly, the interlayer insulating film can be uniformly melted and removed by the laser light in a wide range of the scribe region.
A semiconductor device according to a third aspect of the invention includes: a semiconductor substrate; a diffusion layer conductive film formed on the semiconductor substrate; an interlayer insulating film layered on the semiconductor substrate and having an interconnect pattern; a plurality of circuit regions formed in the semiconductor substrate; and a scribe region formed around the circuit regions and separating the circuit regions from each other. The interconnect pattern having a flat plate shape is formed at least in a region to which laser light is emitted in the scribe region.
In the semiconductor device of the third aspect of the invention, laser light that is emitted in a laser grooving process can be reliably absorbed by the flat plate interconnect pattern. An upper layer of the interlayer insulating film is first melted and the melted part is removed. Melting of the interlayer insulating film by the laser light then successively proceeds toward a lower layer of the interlayer insulating film. Therefore, the interlayer insulating film can be uniformly melted and removed by the laser light in a wide range of the scribe region. Even when the diffusion layer conductive film is formed in the scribe region to which laser light is emitted, the laser light is blocked by the interconnect pattern formed in the interlayer insulating film on the diffusion layer conductive film. Accordingly, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
A semiconductor device according to a fourth aspect of the invention includes: a semiconductor substrate; a diffusion layer conductive film formed on the semiconductor substrate; an interlayer insulating film layered on the semiconductor substrate; an interconnect pattern and a via pattern formed in the interlayer insulating film; a plurality of circuit regions formed in the semiconductor substrate; and a scribe region formed around the circuit regions and separating the circuit regions from each other. At least a region to which laser light is emitted in the scribe region is covered by the interconnect patterns and the via patterns respectively formed in a plurality of interlayer insulating films, when viewed two-dimensionally.
In the semiconductor device of the fourth aspect of the invention, laser light is first absorbed by the interconnect pattern and the via pattern in a laser grooving process. As the laser light is absorbed by the interconnect pattern and the via pattern, heat is generated and the interlayer insulating film is melted. More specifically, an upper layer of the interlayer insulating film is first melted and the melted part is removed by sublimation. The melted part continuously expands in the interlayer insulating film. As a result, the interlayer insulating film can be uniformly melted and removed by the laser light in a wide range of the scribe region. Since the laser light is blocked by the interconnect pattern and the via pattern formed in the interlayer insulating film, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
In the semiconductor device of the fourth aspect of the invention, it is preferable that the interconnect pattern and the via pattern are formed in the plurality of interlayer insulating films so as to cover the entire scribe region when viewed two-dimensionally.
In the semiconductor device of the fourth aspect of the invention, it is preferable that the interconnect pattern is formed in the entire scribe region, and the via pattern is formed only in an upper layer of the interlayer insulating film in a region around a central line of the scribe region.
In this structure, the interconnect pattern and the via pattern are formed in an upper layer of the interlayer insulating film which has a larger film thickness. Melting of the interlayer insulating film by the laser light successively expands from an upper layer toward a lower layer of the interlayer insulating film. Therefore, the interlayer insulating film can be uniformly melted and removed.
In the semiconductor device of the fourth aspect of the invention, the diffusion layer conductive film may be formed in the scribe region.
In this structure, laser light in a laser grooving process is absorbed by the interconnect pattern and the via pattern formed in the interlayer insulating film on the diffusion layer conductive film, and the laser light is thus blocked by the interconnect pattern and the via pattern. Therefore, the laser light is not absorbed by the diffusion layer conductive film, and melting and volume expansion of the diffusion layer conductive film do not occur, whereby peeling of the interlayer insulating film can be prevented. As a result, the semiconductor device can be prevented from being degraded in quality and reliability by laser light emission.
In the semiconductor device of the fourth aspect of the invention, it is preferable that the interconnect pattern and the via pattern are connected to each other.
As has been described above, in the semiconductor device of the invention, an interlayer insulating film can be uniformly removed by laser light in a dicing process of a semiconductor substrate (wafer) by a laser grooving method. Therefore, generation of chipping defects can be prevented.
A first embodiment of the invention will be described with reference to the figures.
As shown in
As shown in
As shown in
A first protective film 8a and a second protective film 8b are sequentially formed on a top layer of the interlayer insulating film having a plurality of layers. The first protective film 8a and the second protective film 8b are made of an insulating material. The first protective film 8a and the second protective film 8b are disconnected between each circuit region 2 and the scribe region 4. An embedded film 9 made of a conductive material is formed at the end of the first protective film 8a in each circuit region 2. A resin protective film 10 made of an insulating material is formed on the second protective film 8b in each circuit region 2. Although not shown in the figure, an etching blocking film, a cap film, or the like may be formed between the first interlayer insulating film 6 and the second interlayer insulating film 7.
As shown in
As described above, in the semiconductor device of the first embodiment, no diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, and no interconnects and no vias are formed in the scribe region 4. In the semiconductor device of the first embodiment, the scribe region 4 having no conductive members such as a diffusion layer conductive film, interconnects, and vias is cut in a laser grooving process.
As shown in
In the first embodiment, the width of the scribe region 4 is, for example, about 60 μm to about 150 μm, and the width of the blade dicing region 5 located in the middle of the scribe region 4 is about the same as or slightly larger than the width of a dicing blade. For example, the width of the blade dicing region 5 is, for example, about 30 μm to about 70 μm.
The first interlayer insulating films 6 and the second interlayer insulating films 7 can be generally made of an insulating material such as TEOS (Tetra Ethyl Ortho Silicate) or FSG (Fluoro Silicate Glass). Instead of an insulating material such as TEOS or FSG, the first interlayer insulating films 6 and the second interlayer insulating films 7 may be made of various low dielectric constant films such as silicon oxycarbide (SiOC) or a porous film. The first interlayer insulating films 6 and the second interlayer insulating films 7 may be made of the same material or different materials.
For simplicity, the first interlayer insulating films 6 and the second interlayer insulating films 7 are shown to have the same thickness in
In the first embodiment, the interlayer insulating film in the scribe region 4 is formed by a plurality of layers. As shown in
Dummy interconnects and dummy vias that form dummy patterns can be formed in each circuit region 2 simultaneously with a process of forming interconnects and vias that form interconnect patterns in each circuit region 2 by using a damascene method or the like. The interconnects and dummy interconnects and the vias and dummy vias can be made of a conductive material such as copper or copper alloy. A diffusion preventing barrier film (not shown) made of a thin film such as titanium nitride (TiN) may be formed at each interface between the first interlayer insulating film 6 and the second interlayer insulating film 7.
The first protective film 8a and the second protective film 8b formed on the top surface of the topmost first interlayer insulating film 6 are generally made of silicon nitride (SiN) or the like having a pad portion (not shown) made of a conductive material such as aluminum (Al) in an opening. A two-layer structure of the protective films 8a and 8b are used in this embodiment. However, a single-layer structure or a three or more layer structure may alternatively be used. The embedded film 9 formed at the end of the first protective film 8a in each circuit region 2 and embedded in each gap in the first protective film 8a and the second protective film 8b may be made of a conductive material such as Al. For example, the embedded film 9 can be formed simultaneously with the pad portion in a process of forming the pad portion. This structure reduces damages such as chippings produced by cutting in a dicing process.
In the first embodiment, the seal ring 3 is formed as a double seal ring around each circuit region 2 of the semiconductor substrate 1 and is formed by alternately forming line-shaped (linear) interconnect patterns and line vias as described above. Since the seal ring 3 of this structure seals each circuit region 2 from the outside, contamination of the circuit regions 2 with water, impurities, and the like can be prevented. The seal ring 3 can be made of the same material in the same process as the interconnect patterns formed in the circuit regions 2. The seal ring 3 need not necessarily be a double seal ring, but may be a single seal ring or a triple or more seal ring.
A second embodiment of the invention will now be described with reference to the figures. In the embodiment and modifications described below, the same elements as those of the first embodiment are denoted with the same reference numerals and characters, and description thereof will be omitted. In the second embodiment, a dummy pattern formed by dummy interconnects or dummy vias is formed in the scribe region 4.
As shown in
As shown in
With this structure, the laser light 11 is first absorbed by the first dummy pattern 12 or the second dummy pattern 13 in the laser grooving process. As the laser light 11 is absorbed by the dummy pattern, heat is generated and the interlayer insulating film is melted. More specifically, an upper part of the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7 is first melted and the melted part is removed by sublimation. The melted part continuously expands in the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7. As a result, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. In this way, a laser grooving process can be performed while preventing peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
In the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 is formed by an interconnect pattern. However, the first dummy pattern 12 and the second dummy pattern 13 may alternatively be formed by a via pattern.
The dummy interconnects or dummy vias of the first dummy pattern 12 and the second dummy pattern 13 can be formed in the scribe region 4 simultaneously with a process of forming an interconnect pattern or a via pattern in the circuit regions 2 by a damascene process or the like, by using the same material.
In the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 are formed so that dummy interconnects or dummy vias are arranged in a matrix pattern. However, the dummy interconnects or dummy vias may be arranged in a pattern other than the matrix pattern as long as the first dummy pattern 12 and the second dummy pattern 13 cover the scribe region 4.
The scribe region 4 may be covered by a combination of two or more dummy patterns.
In the second embodiment, the dummy patterns are formed only in the first interlayer insulating films 6. However, the dummy patterns may be formed in the second interlayer insulating films 7.
(First Modification of the Second Embodiment)
Hereinafter, a first modification of the second embodiment of the invention will be described with reference to the figures. The first modification of the second embodiment is characterized in that a diffusion layer conductive film 14 is formed between the semiconductor substrate 1 and the interlayer insulating film.
As shown in
In the first modification of the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 cover the scribe region 4 in the semiconductor substrate 1 even though the diffusion layer conductive film 14 is formed. Therefore, laser light 11 is first absorbed by the first dummy pattern 12 or the second dummy pattern 13 in the laser grooving process. As the laser light 11 is absorbed by the dummy pattern, heat is generated and the interlayer insulating film is melted. This is the same as in the second embodiment. More specifically, an upper part of the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7 is first melted and the melted part is removed by sublimation. The melted part continuously expands in the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7. As a result, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. The interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film 14. Therefore, the interlayer insulating film is not affected by melting of the diffusion layer conductive film 14. As a result, peeling of the interlayer insulating film can be prevented.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 in the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
(Second Modification of the Second Embodiment)
A second modification of the second embodiment will now be described with reference to the figures.
As shown in
With this structure, the laser light 11 is first absorbed by the first dummy pattern 12 or the second dummy pattern 13 in the laser grooving process. As the laser light 11 is absorbed by the dummy pattern, heat is generated and the interlayer insulating film is melted. More specifically, an upper part of the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7 is first melted and the melted part is removed by sublimation. The melted part continuously expands in the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7. As a result, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. In this way, a laser grooving process can be performed while preventing peeling of the interlayer insulating film.
Even when a diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
In the second modification, a first interlayer insulating film 6 having no dummy pattern is provided between a first interlayer insulating film 6 having a first dummy pattern 12 and a first interlayer insulating film 6 having a second dummy pattern 13. However, the invention is not limited to this structure. In other words, the structure of the second modification is not limited as long as the scribe region 4 is covered by a combination of two or more dummy patterns. For example, a dummy pattern formed in the second interlayer insulating films 7 may be combined with a dummy pattern formed in the first interlayer insulating films 6 so as to cover the scribe region 4.
An interlayer insulating film in which dummy patterns are formed can be appropriately selected according to the interconnect pattern or via pattern formed in the circuit regions 2.
(Third Modification of the Second Embodiment)
A third modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
In this structure, the scribe region 4 is covered by the dummy patterns when viewed two-dimensionally, and the total amount of dummy patterns formed in the scribe region 4 can be reduced. Accordingly, the quantity of laser light 11 to be used in a laser grooving process can be reduced, thereby enabling stable operation. The first interlayer insulating films 6 and the second interlayer insulating films 7 can thus be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. As a result, peeling of the interlayer insulating film can be prevented.
In the third modification of the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 overlap each other only at their edges. However, the same effects can be obtained even when the respective edges of the first dummy pattern 12 and the second dummy pattern 13 are aligned with each other.
Even when a diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
As in the second embodiment, a dummy pattern different from the first dummy pattern 12 and the second dummy pattern 13 may be used. Two or more dummy patterns may be combined if the dummy patterns are formed so as to overlap each other at their edges and to cover the scribe region 4. A dummy pattern may be formed in the second interlayer insulating films 7 and may be combined with a dummy pattern formed in the first interlayer insulating films 6.
(Fourth Modification of the Second Embodiment)
A fourth modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
In this structure, the scribe region 4 is approximately covered by a pair of first dummy pattern 12 and second dummy pattern 13 when viewed two-dimensionally. The scribe region 4 can be entirely covered by a combination of the pair of first dummy pattern 12 and second dummy pattern 13 with another pair of first dummy pattern 12 and second dummy pattern 13. The total amount of dummy patterns formed in the scribe region 4 can thus be reduced. Accordingly, the quantity of laser light 11 to be used in a laser grooving process can be relatively reduced, enabling stable operation. Even with this structure, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. A laser grooving process can thus be performed while preventing peeling of the interlayer insulating film.
Even when a diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
Note that, like the second embodiment and the modifications described above, the invention is not limited to the structure of
(Fifth Modification of the Second Embodiment)
A fifth modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
In this structure, the scribe region 4 can be covered by the dummy patterns when viewed two-dimensionally even though the total amount of dummy patterns formed in the scribe region 4 is reduced. As a result, the quantity of laser light 11 to be used in a laser grooving process can be relatively reduced, enabling stable operation. Moreover, since no dummy pattern is formed in the lower first interlayer insulating films 6 and the lower second interlayer insulating films 7 formed on the semiconductor substrate 1, melting of dummy metal does not occur in the lower part of the interlayer insulating film. Accordingly, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. A laser grooving process can thus be performed while preventing peeling of the interlayer insulating film.
Even when a diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
(Sixth Modification of the Second Embodiment)
A sixth modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
With this structure, the first dummy pattern 12 and the second dummy pattern 13 cover the scribe region 4 with a finer pattern arrangement than in the case where the first dummy pattern 12 and the second dummy pattern 13 are formed in the upper ones of the plurality of first interlayer insulating films 6. Therefore, heat generation and melting of the interlayer insulating film can be more uniformly caused by laser light 11. Accordingly, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. A laser grooving process can thus be performed while preventing peeling of the interlayer insulating film.
Even when a diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
In the sixth modification of the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 are formed in the lower four of the first interlayer insulating films 6 which correspond to fine layers. However, the invention is not limited to this structure. The first dummy pattern 12 and the second dummy pattern 13 may alternatively be formed only in the lower two of the first interlayer insulating films 6, and a first interlayer insulating film 6 having no dummy pattern may be formed between the first interlayer insulating films 6 respectively having the first dummy pattern 12 and the second dummy pattern 13.
(Seventh Modification of the Second Embodiment)
A seventh modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
In this structure, the first interlayer insulating films 6 and the second interlayer insulating films 7 have almost no material that absorbs laser light 11 in the region to which laser light 11 is emitted. Moreover, since heat generated in the exothermic reaction caused by the laser light 11 is released in the opposite direction to the semiconductor substrate 1, a laser grooving process can be performed without damaging the semiconductor substrate 1.
Accordingly, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. A laser grooving process can thus be performed while preventing peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
In the seventh modification of the second embodiment, the first dummy pattern 12 and the second dummy pattern 13 are formed in the scribe region 4 other than the blade dicing region 5. However, the invention is not limited to this structure. Any structure may be used as long as the scribe region 4 other than the blade dicing region 5 is covered by a plurality of dummy patterns or a flat-plate dummy pattern.
In the seventh modification of the second embodiment, the interlayer insulating film in the scribe region 4 is formed by a plurality of interlayer insulating films. As shown in
(Eighth Modification of the Second Embodiment)
An eighth modification of the second embodiment of the invention will now be described with reference to the figures.
As shown in
With this structure, laser light 11 emitted in a laser grooving process can be reliably blocked by the third dummy pattern 15 formed in the first interlayer insulating films 6. Melting of the third dummy pattern 15 by the laser light 11 sequentially proceeds from the upper first interlayer insulating films 6 toward the lower first interlayer insulating films 6. Therefore, the upper part of the interlayer insulating film has already been removed when the laser light 11 reaches a diffusion layer conductive film formed between the semiconductor substrate 1 and the interlayer insulating film. Accordingly, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. A laser grooving process can thus be performed while preventing peeling of the interlayer insulating film.
Even when the diffusion layer conductive film is formed between the semiconductor substrate 1 and the interlayer insulating film, the interlayer insulating film has been melted and removed before the laser light 11 is emitted to the diffusion layer conductive film, as in the first modification of the second embodiment. Therefore, melting of the diffusion layer conductive film does not cause any influence on the interlayer insulating film, such as peeling of the interlayer insulating film.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
In the eighth modification, the third dummy pattern 15 is formed in the upper five first interlayer insulating films 6. However, the invention is not limited to five films. There may be a first interlayer insulating film in the upper part of the interlayer insulating film which does not have the third dummy pattern 15. In other words, the third dummy pattern 15 need not necessarily be formed in successive first interlayer insulating films 6. The third dummy pattern 15 may be formed in the second interlayer insulating films 7.
In the eighth modification of the second embodiment, the interlayer insulating film in the scribe region 4 is formed by a plurality of layers. As shown in
A third embodiment of the invention will now be described with reference to the figures. In the third embodiment, the same elements as those of the first embodiment are denoted with the same reference numerals and characters, and description thereof will be omitted. In the third embodiment, a dummy pattern formed by dummy vias 16 is formed in a scribe region 4.
As shown in
The dummy vias 16 are thus formed so as to cover the scribe region 4 when viewed two-dimensionally. Since the scribe region 4 is covered by a conductive material of the dummy vias 16, laser light 11 is blocked by the conductive material in a laser grooving process. Accordingly, in the laser grooving process, the laser light 11 is absorbed by the dummy pattern having a plurality of layers. As the laser light 11 is absorbed by the dummy pattern, heat is generated and the interlayer insulating film is melted. Note that copper, aluminum, tungsten, or the like is used as the conductive material.
The interlayer insulating film is melted as in the second embodiment. An upper part of the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7 is first melted and the melted part is removed by sublimation. The melted part continuously expands in the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7. As a result, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. Peeling of the interlayer insulating film can thus be prevented.
A finer dummy pattern can be formed by the dummy vias 16 than by an interconnect pattern because the height of the vias is smaller than the thickness of the interconnects. Therefore, pattern uniformity can be improved by using the dummy pattern formed by the dummy vias 16. Moreover, the dummy pattern formed by the dummy vias 16 improves uniformity of heat conduction during emission of the laser light. Accordingly, a laser grooving process can be performed efficiently.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
The dummy vias 16 of the dummy pattern can be formed in the scribe region 4 simultaneously with a process of forming a via pattern in the circuit regions 2 by a damascene process or the like, by using the same material.
In the third embodiment, the dummy vias 16 are formed only in the first interlayer insulating film 6. However, the dummy vias 16 may be formed in the second interlayer insulating films 7.
Although not shown in the figure, a diffusion layer conductive film may be formed between the semiconductor substrate and the interlayer insulating film, as in the first modification of the second embodiment. The interlayer insulating film has been melted and removed before laser light is emitted to the diffusion layer conductive film in the laser grooving process. Therefore, the interlayer insulating film is not affected by melting of the diffusion layer conductive film.
A fourth embodiment of the invention will now be described with reference to the figures. In the fourth embodiment, the same elements as those of the first embodiment are denoted with the same reference numerals and characters, and description thereof will be omitted. In the fourth embodiment, a dummy pattern formed by dummy interconnects and dummy vias is formed in a scribe region 4.
As shown in
The dummy interconnects 17 and the dummy vias 16 are thus formed so as to cover the scribe region 4 when viewed two-dimensionally. In this case, the scribe region 4 is covered by a conductive material of the dummy interconnects 17 and the dummy vias 16, and laser light 11 is blocked by the conductive material in a laser grooving process. Accordingly, the laser light 11 is absorbed by the dummy interconnects 17 and the dummy vias 16 in the laser grooving process. As the laser light 11 is absorbed by the dummy interconnects 17 and the dummy vias 16, heat is generated and the interlayer insulating film is easily melted. Note that copper, aluminum, tungsten, or the like is used as the conductive material.
The interlayer insulating film is melted as in the second embodiment. An upper part of the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7 is first melted and the melted part is removed by sublimation. The melted part continuously expands in the layered structure of the first interlayer insulating films 6 and the second interlayer insulating films 7. As a result, the first interlayer insulating films 6 and the second interlayer insulating films 7 can be uniformly melted and removed by the laser light 11 in a wide range of the scribe region 4. Peeling of the interlayer insulating film can thus be prevented.
Since the dummy interconnects 17 and the dummy vias 16 are connected, excellent thermal conductivity is obtained. Therefore, a melting property of the interlayer insulating film by the laser light 11 is improved, whereby the melted part is homogenized.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
The dummy interconnects 17 and the dummy vias 16 can be formed in the scribe region 4 simultaneously with a process of forming an interconnect pattern and a via pattern in the circuit regions 2 by a damascene process or the like, by using the same material.
Although not shown in the figure, a diffusion layer conductive film may be formed between the semiconductor substrate and the interlayer insulating film, as in the first modification of the second embodiment. The interlayer insulating film has been melted and removed before laser light is emitted to the diffusion layer conductive film in the laser grooving process. Therefore, the interlayer insulating film is not affected by melting of the diffusion layer conductive film.
(First Modification of the Fourth Embodiment)
A first modification of the fourth embodiment of the invention will now be described with reference to the figures. The first modification of the fourth embodiment is characterized in that a dummy pattern formed by dummy interconnects 17 and dummy vias 16 is formed especially in a blade dicing region 5 of a scribe region 4.
As shown in
In this structure, the dummy interconnects 17 and the dummy vias 16 that are made of a conductive material are formed in the scribe region 4, especially the blade dicing region 5, to be melted by laser light 11. Therefore, excellent thermal conductivity is obtained. Accordingly, a melting property of the interlayer insulating film by the laser light 11 is improved, whereby the melted part is homogenized. Since the interlayer insulating film is uniformly removed by the laser light 11, peeling of the interlayer insulating film can be prevented. Moreover, influences caused by formation of the dummy pattern in the scribe region 4 can be suppressed in a blade dicing process.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
Although not shown in the figure, a diffusion layer conductive film may be formed between the semiconductor substrate and the interlayer insulating film, as in the first modification of the second embodiment. The interlayer insulating film has been melted and removed before laser light is emitted to the diffusion layer conductive film in the laser grooving process. Therefore, the interlayer insulating film is not affected by melting of the diffusion layer conductive film.
In the first modification of the fourth embodiment, the dummy interconnects 17 are formed in the whole scribe region 4 and the dummy interconnects 17 are connected to each other by corresponding dummy vias 16 in the blade dicing region 5. Alternatively, however, the dummy vias 16 may be formed in the whole scribe region 4 and the dummy interconnects 17 may be formed in the blade dicing region 5 and connected by corresponding dummy vias 16. In other words, the same effects can be obtained as long as the dummy interconnects 17 and the dummy vias 16 are formed in the blade dicing region 5 so that every part of the blade dicing region 5 has the dummy interconnects 17 or the dummy interconnects 16 when viewed two-dimensionally, and the dummy interconnects 17 and the dummy vias 16 are connected.
(Second Modification of the Fourth Embodiment)
A second modification of the fourth embodiment of the invention will now be described with reference to the figures. The second modification of the fourth embodiment is characterized in that a dummy pattern formed by dummy interconnects 17 and dummy vias 16 is formed in an upper part of an interlayer insulating film especially in a blade dicing region 5 of a scribe region 4.
As shown in
In this structure, the dummy interconnects 17 and the dummy vias 16 that are made of a conductive material are formed in the upper part of the interlayer insulating film in the scribe region 4, especially the blade dicing region 5, to be melted by laser light 11. Therefore, excellent thermal conductivity is obtained. Although not shown in details in the figure, the thickness of each layer of the interlayer insulating film is generally increased toward the top. In the case where the dummy interconnects 17 and the dummy vias 16 are formed in the upper layers of the interlayer insulating film in the blade dicing region 5, melting of the interlayer insulating film by the laser light 11 continuously expands from the top layer toward the bottom layer. Therefore, the interlayer insulating film can be uniformly melted in a wide range of the scribe region 4. Since a melting property of the interlayer insulating film by the laser light 11 is improved, the melted part is homogenized. Since the interlayer insulating film is uniformly removed by the laser light 11, peeling of the interlayer insulating film can be prevented.
A blade dicing process is then performed in the blade dicing region 5. As in the first embodiment, since the first interlayer insulating films 6 and the second interlayer insulating films 7 which are likely to generate chippings have already been removed in the blade dicing region 5 of the scribe region 4, only the semiconductor substrate 1 made of a single material needs to be cut in the blade dicing region 5 in the blade dicing process. Accordingly, possibility of generating chipping defects can be significantly reduced. Chipping defects can thus be prevented from being generated in a dicing process for cutting out the circuit regions 2 from the semiconductor substrate 1.
Although not shown in the figure, a diffusion layer conductive film may be formed between the semiconductor substrate and the interlayer insulating film, as in the first modification of the second embodiment. The interlayer insulating film has been melted and removed before laser light is emitted to the diffusion layer conductive film in the laser grooving process. Therefore, the interlayer insulating film is not affected by melting of the diffusion layer conductive film.
In the second modification of the fourth embodiment, the dummy interconnects 17 are formed in the whole scribe region 4, and the dummy interconnects 17 are connected to each other by corresponding dummy vias 16 in the upper layers of the interlayer insulating film in the blade dicing region 5. Alternatively, however, the dummy vias 16 may be formed in the whole scribe region 4, and the dummy interconnects 17 may be formed in the upper layers of the interlayer insulating film in the blade dicing region 5 and connected by corresponding dummy vias 16. In other words, the same effects can be obtained as long as the dummy interconnects 17 and the dummy vias 16 are formed in the upper layers of the interlayer insulating film in the blade dicing region 5 so that every part of the blade dicing region 5 has the dummy interconnects 17 or the dummy interconnects 16 when viewed two-dimensionally, and the dummy interconnects 17 and the dummy vias 16 are connected.
As has been described above, the semiconductor device of the invention can implement uniform removal of the interlayer insulating film in a wide range of the scribe region by the laser grooving process and can prevent peeling of the interlayer insulating film in the laser grooving process and the dicing process. Therefore, the invention is useful as a semiconductor device having a multilayer interconnect structure, and the like.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2007-283733 | Oct 2007 | JP | national |
| 2008-087906 | Mar 2008 | JP | national |
