CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority to Taiwanese Invention Patent Application No. 112112626, filed on Mar. 31, 2023, the entire disclosure of which is incorporated by reference herein.
FIELD
The disclosure relates to a semiconductor device, and more particularly to a semiconductor device that utilizes a liquid metal layer as a heat dissipation interface.
BACKGROUND
A liquid metal is a metal alloy with a low melting point that remains in a liquid state at room temperature. For example, the liquid metal may be a gallium-indium-tin alloy, a gallium-indium alloy, an indium-bismuth-tin alloy, or an indium-bismuth-zinc alloy. Since the liquid metal has a stable property on thermal conductivity and electrical conductivity, and its thermal conductivity and specific heat capacity are significantly higher than those of a conventional silicone thermal grease, the liquid metal is currently utilized as a thermal interface material between a heat source and a heat dissipation module. However, a conventional heat dissipation module usually employs copper or aluminum as its primary materials. Aluminum is likely to interact with the liquid metal and is prone to rapid corrosion caused by gallium metal in the liquid metal, which results in a degradation in thermal conductivity performance of the liquid metal, and damage to the conventional heat dissipation module. Moreover, copper has a much stable electron configuration due to 10 electrons in its 3d orbital (3d10), so that, compared to aluminum, copper is less susceptible to rapid corrosion caused by gallium metal. Nevertheless, referring to FIG. 1, empirical observations reveal that after a period of time and under an elevated temperature, copper and gallium may still cooperatively form needle-like copper-gallium intermetallic compounds (e.g., CuGa2 and Cu9Ga4) at an interface therebetween, which is also known as liquid metal dry-out. Referring to FIGS. 2 to 4, such intermetallic compounds gradually accumulate and thicken under long term use, and eventually cause the liquid metal to lose its thermal conductivity and electrical conductivity. In addition, when the liquid metal spills over and comes into contact with electronic components or a substrate, it poses a risk of short circuit damage.
In view of the above, there is still a need to improve a semiconductor device that uses a liquid metal layer as a heat dissipation interface in the market.
SUMMARY
Therefore, in a first aspect, the present disclosure provides a semiconductor device, that can alleviate at least one of the drawbacks of the prior art. The semiconductor device includes a substrate unit, a chip, a liquid metal layer, a heat dissipation cover, and a corrosion protection layer. The substrate unit includes a substrate, a plurality of electronic components disposed on the substrate, and an insulating layer disposed on the substrate and encapsulating the electronic components. The chip is disposed on the substrate. The liquid metal layer is coated on the chip. The heat dissipation cover is disposed on and covers the substrate. The corrosion protection layer is disposed on the heat dissipation cover to encapsulate the heat dissipation cover and comes into contact with the liquid metal layer.
In a second aspect, the present disclosure provides another semiconductor device, that can alleviate at least one of the drawbacks of the prior art. The semiconductor device includes a substrate unit, a chip, a heat conductive layer, a heat dissipation cover, a corrosion protection layer, a heat dissipation module, a liquid metal layer, an anti-corrosion layer, and a blocking member. The substrate unit includes a substrate and a plurality of electronic components disposed on the substrate. The chip is disposed on the substrate. The heat conductive layer is coated on the chip. The heat dissipation cover is disposed on and covers the substrate. The corrosion protection layer is disposed on the heat dissipation cover to encapsulate the heat dissipation cover and comes into contact with the heat conductive layer. The heat dissipation module is disposed on and covers the heat dissipation cover. The liquid metal layer is disposed between the heat dissipation cover and the heat dissipation module and comes into contact with the corrosion protection layer. The anti-corrosion layer is disposed on the heat dissipation module and comes into contact with the liquid metal layer. The blocking member is disposed under the anti-corrosion layer and surrounds the liquid metal layer.
BRIEF DESCRIPTION OF THE DRAWINGS
Other features and advantages of the disclosure will become apparent in the following detailed description of the embodiment(s) with reference to the accompanying drawings. It is noted that various features may not be drawn to scale.
FIG. 1 is an image illustrating formation of needle-like copper-gallium intermetallic compounds.
FIGS. 2 to 4 are images illustrating accumulation of the needle-like copper-gallium intermetallic compounds.
FIG. 5 is a schematic sectional view illustrating a first embodiment of a semiconductor device according to the present disclosure.
FIG. 6 is a schematic top view of the first embodiment in which a heat dissipation cover is detached to show an interior arrangement of the first embodiment.
FIG. 7 is a schematic sectional view illustrating a second embodiment of a semiconductor device according to the present disclosure.
FIG. 8 is a schematic sectional view illustrating a third embodiment of a semiconductor device according to the present disclosure.
FIG. 9 is a schematic sectional view illustrating a fourth embodiment of a semiconductor device according to the present disclosure.
FIG. 10 is a schematic sectional view illustrating a variation of the fourth embodiment.
FIG. 11 is a schematic sectional view illustrating a fifth embodiment of a semiconductor device according to the present disclosure.
FIG. 12 is a schematic sectional view illustrating a variation of the fifth embodiment.
FIG. 13 is a schematic sectional view illustrating a sixth embodiment of a semiconductor device according to the present disclosure.
FIG. 14 is a schematic sectional view illustrating a variation of the sixth embodiment.
DETAILED DESCRIPTION
Before the disclosure is described in greater detail, it should be noted that where considered appropriate, reference numerals or terminal portions of reference numerals have been repeated among the figures to indicate corresponding or analogous elements, which may optionally have similar characteristics.
It should be noted herein that for clarity of description, spatially relative terms such as “top,” “bottom,” “upper,” “lower,” “on,” “above,” “under,” “over,” “downwardly,” “upwardly” and the like may be used throughout the disclosure while making reference to the features as illustrated in the drawings. The features may be oriented differently (e.g., rotated 90 degrees or at other orientations) and the spatially relative terms used herein may be interpreted accordingly.
Referring to FIGS. 5 and 6, a first embodiment of a semiconductor device according to the present disclosure includes a substrate unit 1, a chip 2 that is disposed on the substrate unit 1, a liquid metal layer 3 that is coated on a top surface of the chip 2, a heat dissipation cover 4 that is disposed on and covers the substrate unit 1 and the chip 2, and a corrosion protection layer 5 that is coated or plated on the heat dissipation cover 4 to encapsulate the heat dissipation cover 4 and that comes into contact with the liquid metal layer 3.
In the first embodiment, the substrate unit 1 includes a substrate 11 on which the chip 2 is disposed, a plurality of electronic components 13 that are disposed on the substrate 11, and an insulating layer 12 that is coated and disposed on the substrate 11 and encapsulates the electronic components 13. The insulating layer 12 is made of a glue material or a polymeric material, and a top surface of the insulating layer 12 does not abut against the corrosion protection layer 5 (see FIG. 5). By virtue of the insulating layer 12, the plurality of electronic components 13 are effectively encapsulated and protected, so that the plurality of electronic components 13 do not come into contact with overflow of the liquid metal layer 3. In some embodiments, the liquid metal layer 3 may be a gallium-containing layer. The gallium-containing layer may be a gallium-indium-tin alloy layer or a gallium-indium alloy layer, etc. In some embodiments, the heat dissipation cover 4 may be an integrated heat spreader (IHS), and may be made of an isotropic material (e.g., metal) or an anisotropic material (e.g., graphite or ceramic). The metal of the heat dissipation cover 4 may be aluminum. The heat dissipation cover 4 and the substrate 11 of the substrate unit 1 cooperatively define an inner space 41 for accommodating the chip 2 and the liquid metal layer 3.
In the first embodiment, a material of the corrosion protection layer 5 may include nickel metal, a nickel-palladium-gold alloy, gold metal, silver metal, a graphite material, or a ceramic material. In an embodiment, the material of the corrosion protection layer 5 is selected from the group consisting of nickel metal, a nickel-palladium-gold alloy, gold metal, silver metal, a graphite material, and a ceramic material. The material of the corrosion protection layer 5 may be different from that of the heat dissipation cover 4. The corrosion protection layer 5 is able to prevent direct contact between the liquid metal layer 3 and the heat dissipation cover 4, so as to prevent corrosion of the heat dissipation cover 4 influenced by the liquid metal layer 3, and to prevent formation of intermetallic compounds between the liquid metal layer 3 and the heat dissipation cover 4, thereby effectively ensuring stability on thermal conductivity and electrical conductivity of the liquid metal layer 3. Meanwhile, the liquid metal layer 3 and the heat dissipation cover 4 may provide a better heat dissipation effect, so that the semiconductor device has a better working efficiency. It should be noted that the heat dissipation cover 4 may be made of an anticorrosive material, and may be integrally formed with the corrosion protection layer 5. In addition, the heat dissipation cover 4 may be designed to have heat dissipating fins, but other designs may also be suitable for this disclosure.
Referring to FIG. 7, a second embodiment of the semiconductor device according to the present disclosure is generally similar to the first embodiment, except that in the second embodiment, the semiconductor device further includes a heat dissipation module 6 that is disposed on and covers the heat dissipation cover 4, a heat conductive layer 7 that is disposed between the heat dissipation cover 4 and the heat dissipation module 6 and comes into contact with the corrosion protection layer 5, and an anti-corrosion layer 8 that is coated or plated on the heat dissipation module 6 and comes into contact with the heat conductive layer 7. In the second embodiment, a material of the heat dissipation module 6 may include copper, aluminum, a metal alloy, or combinations thereof. In an embodiment, the material of the heat dissipation module 6 is selected from the group consisting of copper, aluminum, a metal alloy, and combinations thereof. A material of the heat conductive layer 7 may be a liquid metal. A material of the anti-corrosion layer 8 may include nickel metal, a nickel-palladium-gold alloy, gold metal, silver metal, a graphite material, or a ceramic material. In an embodiment, the material of the anti-corrosion layer 8 is selected from the group consisting of nickel metal, a nickel-palladium-gold alloy, gold metal, silver metal, a graphite material, and a ceramic material. In addition, the insulating layer 12 abuts against the corrosion protection layer 5. The second embodiment utilizes both the corrosion protection layer 5 and the anti-corrosion layer 8 to prevent the heat conductive layer 7 from directly contacting the heat dissipation cover 4 and the heat dissipation module 6. It should be noted that the first embodiment may adopt the design in which the insulating layer 12 abuts against the corrosion protection layer 5, and the second embodiment may adopt the design in which the insulating layer 12 does not abut against the corrosion protection layer 5.
Referring to FIG. 8, a third embodiment of the semiconductor device according to the present disclosure is generally similar to the second embodiment, except that in the third embodiment, the semiconductor device does not include the anti-corrosion layer 8 (see FIG. 7), and the material of the heat conductive layer 7 may be a thermal grease, a thermal pad, a phase change material made of silicone oil or non-silicone oil, or a solder.
Referring to FIG. 9, a fourth embodiment of the semiconductor device according to the present disclosure is generally similar to the second embodiment, except that in the fourth embodiment, the material of the heat conductive layer 7 may be the liquid metal, the thermal grease, the thermal pad, the phase change material made of silicone oil or non-silicone oil, or the solder, and the locations of the heat conductive layer 7 and the liquid metal layer 3 are interchanged. Moreover, the semiconductor device further includes a blocking member 9 that is disposed under the anti-corrosion layer 8, that is disposed between the corrosion protection layer 5 and the anti-corrosion layer 8 and that surrounds the liquid metal layer 3. A bottom surface of the blocking member 9 comes into contact with the corrosion protection layer 5, and a top surface of the blocking member 9 comes into contact with the anti-corrosion layer 8. The blocking member 9 serves to prevent a spillover of the liquid metal layer 3 from reaching a mainboard (not shown), which may cause a short circuit and corrosion of metal components of the mainboard. In the fourth embodiment, the blocking member 9 is made of a polymeric material. In addition, when the material of the heat conductive layer 7 is the liquid metal, the insulating layer 12 encapsulates the plurality of electronic components 13. In this embodiment, the insulating layer 12 may not contact the corrosion protection layer 5 (see FIG. 9), or may abut against the corrosion protection layer 5. When the material of the heat conductive layer 7 is the thermal grease, the thermal pad, the phase change material made of silicone oil or non-silicone oil, or the solder, the insulating layer 12 of the semiconductor device may be dispensed with (see FIG. 10, a variation of the fourth embodiment).
Referring to FIG. 11, a fifth embodiment of the semiconductor device according to the present disclosure is generally similar to the fourth embodiment, except that in the fifth embodiment, the blocking member 9 is disposed outside the heat dissipation cover 4 and the corrosion protection layer 5, and surrounds the heat dissipation cover 4 and the corrosion protection layer 5. In addition, the substrate unit 1 is not completely covered by the heat dissipation cover 4 so that a part of the substrate 11 is exposed from the heat dissipation cover 4, and the blocking member 9 is disposed between and is in contact with the anti-corrosion layer 8 and the substrate 11. When the material of the heat conductive layer 7 is the liquid metal, the insulating layer 12 is disposed on the substrate 11, and encapsulates the plurality of electronic components 13. In this embodiment, the insulating layer 12 may not contact the corrosion protection layer 5 (see FIG. 11), or may abut against the corrosion protection layer 5. When the material of the heat conductive layer 7 is the thermal grease, the thermal pad, the phase change material made of silicone oil or non-silicone oil, or the solder, the insulating layer 12 of the semiconductor device may be dispensed with (see FIG. 12, a variation of the fifth embodiment).
Referring to FIG. 13, a sixth embodiment of the semiconductor device according to the present disclosure is generally similar to the fifth embodiment, except that in the sixth embodiment, some of the electronic components 13 are located in the inner space 41 defined by the heat dissipation cover 4 and the substrate 11, and some of the electronic components 13 are located outside the heat dissipation cover 4 (e.g., located at the part of the substrate 11 that is exposed from the heat dissipation cover 4). The electronic components 13 may be disposed on the substrate 11 or may be embedded within the substrate 11. The insulating layer 12 may be disposed on the substrate 11 at a location where the electronic components 13 are disposed. When the electronic components 13 are disposed on the substrate 11, the insulating layer 12 may encapsulate the electronic components 13. When the electronic components 13 are embedded within the substrate 11, the insulating layer 12 may be overlaid on a top of the electronic components 13, and further encapsulates the electronic components 13 within the substrate 11. In this embodiment, the electronic components 13 located in the inner space 41 are disposed on (i.e., protrude from) the substrate 11, and for the electronic components 13 located outside the heat dissipation cover 4, some of them are disposed on (i.e., protrude from) the substrate 11, and some of them are embedded within the substrate 11. Moreover, a first portion of the insulating layer 12 may encapsulate the electronic components 13 located in the inner space 41, and a second portion of the insulating layer 12 may encapsulate or be overlaid on the electronic components 13 located outside the heat dissipation cover 4 (which depends on the arrangement, i.e., protruding from or embedded within the substrate 11, of the electronic components 13). When the material of the heat conductive layer 7 is the liquid metal, the first portion of the insulating layer 12 is disposed on the substrate 11 and encapsulates the electronic components 13 located in the inner space 41. The first portion of the insulating layer 12 may not contact the corrosion protection layer 5 (see FIG. 13), or a top of the first portion of the insulating layer 12 may abut against the corrosion protection layer 5. When the material of the heat conductive layer 7 is the thermal grease, the thermal pad, the phase change material made of silicone oil or non-silicone oil, or the solder, it may be unnecessary to dispose the first portion of the insulating layer 12 on the electronic components 13 that are located in the inner space 41 (see FIG. 14, a variation of the six embodiment). In addition, in order to prevent any potential leakage of the liquid metal layer 3, the blocking member 9 is disposed between the anti-corrosion layer 8 and the second portion of the insulating layer 12 and surrounds the heat dissipation cover 4 and the corrosion protection layer 5.
In summary, in the semiconductor device according to the present disclosure, by virtue of the corrosion protection layer 5 and the anti-corrosion layer 8, direct contact of the liquid metal layer 3 or the heat conductive layer 7 with the heat dissipation cover 4 and the heat dissipation module 6 can be prevented. In addition to preventing corrosion, the formation of intermetallic compounds that are generated between the liquid metal layer 3 and the heat dissipation cover 4 can also be prevented, thus effectively maintaining the stability of the liquid metal layer 3. Furthermore, the insulating layer 12 may encapsulate the electronic components 13, thereby effectively preventing such electronic components 13 from coming into contact with any spilled liquid metal layer 3.
In the description above, for the purposes of explanation, numerous specific details have been set forth in order to provide a thorough understanding of the embodiment(s). It will be apparent, however, to one skilled in the art, that one or more other embodiments may be practiced without some of these specific details. It should also be appreciated that reference throughout this specification to “one embodiment,” “an embodiment,” an embodiment with an indication of an ordinal number and so forth means that a particular feature, structure, or characteristic may be included in the practice of the disclosure. It should be further appreciated that in the description, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of various inventive aspects; such does not mean that every one of these features needs to be practiced with the presence of all the other features. In other words, in any described embodiment, when implementation of one or more features or specific details does not affect implementation of another one or more features or specific details, said one or more features may be singled out and practiced alone without said another one or more features or specific details. It should be further noted that one or more features or specific details from one embodiment may be practiced together with one or more features or specific details from another embodiment, where appropriate, in the practice of the disclosure.
While the disclosure has been described in connection with what is(are) considered the exemplary embodiment(s), it is understood that this disclosure is not limited to the disclosed embodiment(s) but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Patent Application
20240332217
