Claims
- 1. A method of manufacturing a low power transistors formed in a face of a semiconductor layer having a first conductivity type, comprising the steps of:implanting impurities of said first conductivity type to form a super-steep retrograde channel a predetermined distance below said face of said semiconductor layer; selectively implanting a shallow layer of impurities of a second conductivity type adjacent to said face of said semiconductor layer; forming a gate insulatively adjacent to said face of said semiconductor layer and above said shallow impurity layer; forming pockets of impurities of said first conductivity type generally adjacent to said shallow layer of impurities below said gate; and forming a source and drain regions of said second conductivity type disposed on either side of said gate.
- 2. The method, as set forth in claim 1, wherein the step of forming pockets of impurities of said first conductivity type forms said pockets generally in and adjacent said face of said semiconductor layer with said shallow impurity layer therebetween.
- 3. The method, as set forth in claim 1, wherein the step of forming pockets of impurities of said first conductivity type forms said pockets generally adjacent to and below said source and drain regions.
TECHNICAL FIELD OF THE INVENTION
This application claims priority under 35 U.S.C. § 119(e)(1) of application No. 08/725,599 filed Oct. 3, 1996, now U.S. Pat. No. 5,917,219 issued Jun. 29, 1999, and provisional application No. 60/005,216 filed Oct. 9, 1995.
This invention is related in general to the field of semiconductor devices. More particularly, the invention is related to semiconductor devices with pocket implant and counter doping.
US Referenced Citations (12)
Provisional Applications (1)
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Number |
Date |
Country |
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60/005216 |
Oct 1995 |
US |