Claims
- 1-26. (cancelled).
- 27. A method for manufacturing a semiconductor die package, comprising:
molding a package base including a plurality of side walls and a floor having a plurality of holes formed therethrough, wherein interior surfaces of the side walls and floor form a cavity sized to hold a semiconductor die and wherein said molding includes molding an electrically conductive frame into the floor, said frame having a plurality of holes formed therein and the holes through the floor register with the holes of said frame; and inserting electrically-conductive pins into the holes in the floor such that the pins pass into the holes of the frame and extend from an exterior surface of the floor.
- 28. The method of claim 27, further comprising:
electrically connecting a semiconductor die to the pins and to the frame; and attaching a lid to the side walls of the base, the lid and the base sealing the semiconductor die therein.
- 29. The method of claim 28, wherein said step of electrically connecting comprises:
coupling solder balls to the pins and to the frame and coupling the semiconductor die to the solder balls.
- 30. The method of claim 28, wherein the step of electrically connecting comprises:
coupling solder balls to the pins and to the frame; placing a substrate over the solder balls; placing the semiconductor die on the substrate; and electrically connecting the semiconductor die to the substrate.
Parent Case Info
[0001] This application claims the benefit of priority based on provisional Application No. 60/270,635, filed on Feb. 23, 2001, and incorporated herein by reference.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60270635 |
Feb 2001 |
US |
Divisions (1)
|
Number |
Date |
Country |
Parent |
09867438 |
May 2001 |
US |
Child |
10781848 |
Feb 2004 |
US |