Claims
- 1. A semiconductor integrated circuit device, comprising:
- a substrate having a plurality of lines formed on its principal surface; and
- an insulating film which contains an insulating composition with caged molecular structural units, formed on the principal surface of the substrate such as to cover the lines, the caged molecular structural units including Si atoms located at points corresponding to the eight vertices of a cube, and twelve O atoms, each O atom located at a midpoint of each side of the cubic structure, wherein structural units are combined with each other through an oxygen atom.
- 2. The semiconductor integrated circuit device according to claim 1, wherein content of the insulating composition with the caged molecular structural units in the insulating film is 20 wt % or above.
- 3. The semiconductor integrated circuit device according to claim 1, wherein a shell of each of the caged molecular structural units has a structure such that water molecules do not penetrate into a space within the caged molecular structural unit.
- 4. The semiconductor integrated circuit device according to claim 1, wherein the insulating film includes a binder polymer for binding the low-dielectric constant composition.
- 5. The semiconductor integrated circuit device according to claim 1, further comprising:
- an additional insulating layer produced from an inorganic material, disposed over the aforementioned insulating film.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9-252467 |
Sep 1997 |
JPX |
|
Parent Case Info
This application is based on Japanese Patent Application No. 9-252467 filed on Sep. 17, 1997, the entire contents of which are incorporated herein by reference.
US Referenced Citations (8)
Foreign Referenced Citations (3)
Number |
Date |
Country |
6-224330 |
Aug 1994 |
JPX |
7-41550 |
Feb 1995 |
JPX |
7-62103 |
Mar 1995 |
JPX |