Claims
- 1. A semiconductor integrated circuit comprising:A serial-parallel converter for receiving data to be written to memory cells at a plurality of switches as serial data and selecting the switches in a predetermined order to respectively connect with internal nodes; and a switch control circuit receiving a control signal for controlling a selection order of said switches in accordance with the control signal.
- 2. A semiconductor integrated circuit comprising:a serial-paraellel converter for receiving serial data written to memory cells at a plurality of switches and sequentially selecting the switches to connect with internal nodes; and a switch control circuit including a shift register in which a plurality of stages are respectively connected to said switches which correspond, in accordance with an address signal.
Priority Claims (1)
Number |
Date |
Country |
Kind |
11-350541 |
Dec 1999 |
JP |
|
Parent Case Info
This is a Division of application Ser. No. 09/635,868 filed Aug. 10, 2000. The disclosure of the prior application is hereby incorporated by reference herein in its entirety now U.S. Pat. No. 6,343,041.
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