Input/output (I/O) data interface arrangements

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G11C11/4093

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C11/4093Input/output (I/O) data interface arrangements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Input buffer bias current control
- Patent number 12,211,545
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Liang Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and memory
- Patent number 12,211,546
- Issue date Jan 28, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhonglai Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface device
- Patent number 12,212,315
- Issue date Jan 28, 2025
- Cadence Design Systems, Inc.
- Vinod Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Impedance matching circuit, method for impedance matching and semic...
- Patent number 12,206,377
- Issue date Jan 21, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yifan Ji
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and precharging method thereof
- Patent number 12,198,751
- Issue date Jan 14, 2025
- Samsung Electronics Co., Ltd.
- Seungki Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Load reduced memory module
- Patent number 12,200,860
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory devices and controller including adjustable st...
- Patent number 12,198,748
- Issue date Jan 14, 2025
- ULTRAMEMORY INC.
- Masatoshi Hasegawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Parallel-to-serial conversion circuit, parallel-to-serial conversio...
- Patent number 12,199,645
- Issue date Jan 14, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Keqin Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Input buffer circuit and semiconductor memory
- Patent number 12,183,423
- Issue date Dec 31, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Siman Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Application processors and electronic devices including the same
- Patent number 12,183,388
- Issue date Dec 31, 2024
- Samsung Electronics Co., Ltd.
- Kyumin Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable memory timing
- Patent number 12,176,061
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Initializing memory systems
- Patent number 12,164,791
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Erik V. Pohlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for operations in a self-refresh state
- Patent number 12,165,691
- Issue date Dec 10, 2024
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry including a level shifter and logic, configured to receiv...
- Patent number 12,165,693
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Hiroshi Akamatsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal routing between memory die and logic die
- Patent number 12,165,696
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sean S. Eilert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for compensating for crosstalk noise at inp...
- Patent number 12,160,231
- Issue date Dec 3, 2024
- Raghukiran Sreeramaneni
- G11 - INFORMATION STORAGE
Information Patent Grant
Yield recovery scheme for memory
- Patent number 12,154,617
- Issue date Nov 26, 2024
- Xilinx, Inc.
- Brian C. Gaide
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operation method thereof
- Patent number 12,154,616
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Yoon-Joo Eom
- G11 - INFORMATION STORAGE
Information Patent Grant
High-bandwidth DDR DIMM, memory system, and operation method thereof
- Patent number 12,147,713
- Issue date Nov 19, 2024
- INNOSILICON MICROELECTRONICS (ZHUHAI) CO., LTD.
- Liang Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal sampling circuit and semiconductor memory device
- Patent number 12,148,461
- Issue date Nov 19, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zequn Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High capacity memory system using standard controller component
- Patent number 12,148,462
- Issue date Nov 19, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post package repair management
- Patent number 12,148,498
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Danilo Caraccio
- G11 - INFORMATION STORAGE
Information Patent Grant
Frequency divider and memory device including the same
- Patent number 12,149,247
- Issue date Nov 19, 2024
- Samsung Electronics Co., Ltd.
- Jaewoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor die for controlling on-die-termination of another sem...
- Patent number 12,142,314
- Issue date Nov 12, 2024
- Samsung Electronics Co., Ltd.
- Taeyoung Oh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory module with reduced read/write turnaround overhead
- Patent number 12,130,757
- Issue date Oct 29, 2024
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmission circuit, interface circuit, and memory
- Patent number 12,132,018
- Issue date Oct 29, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimension memory device capable of improving sensing accuracy...
- Patent number 12,131,772
- Issue date Oct 29, 2024
- Macronix International Co., Ltd.
- Teng-Hao Yeh
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for access based refresh operations
- Patent number 12,125,514
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Takamasa Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-rail power transition
- Patent number 12,125,517
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory power control by enable circuit
- Patent number 12,119,040
- Issue date Oct 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zhi-Hao Chang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICES CONFIGURED WITH ADAPTIVE WORD LINE PULSE ADJUSTMENT...
- Publication number 20250037751
- Publication date Jan 30, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Cheng Chen
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTION CIRCUITRY
- Publication number 20250037755
- Publication date Jan 30, 2025
- Micron Technology, Inc.
- Timothy P. Finkbeiner
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...
- Publication number 20250037757
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- TAEYOUNG OH
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...
- Publication number 20250021270
- Publication date Jan 16, 2025
- Rambus Inc.
- Dongyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250022504
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOON-JOO EOM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE PERFORMING TIMING SKEW AND OFFSET CALIBRATION
- Publication number 20250014632
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Jaehyeok Baek
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC DEVICES INCLUDING THE S...
- Publication number 20250014634
- Publication date Jan 9, 2025
- Samsung Electronics Co., Ltd.
- Seunghan Kim
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20250006250
- Publication date Jan 2, 2025
- Tahoe Research, Ltd.
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PROGRAMMING METHOD AND RELATED MEMORY CONTROLLER AND DATA STOR...
- Publication number 20250006252
- Publication date Jan 2, 2025
- SILICON MOTION, INC.
- Tsung-Chieh YANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...
- Publication number 20250006251
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Aliasger T. Zaidy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Adjustment of Word Line Timing in Static Dynamic Random Acc...
- Publication number 20240428850
- Publication date Dec 26, 2024
- Ceremorphic, Inc.
- Jay A. CHESAVAGE
- G11 - INFORMATION STORAGE
Information Patent Application
8-T SRAM BITCELL FOR FPGA PROGRAMMING
- Publication number 20240428848
- Publication date Dec 26, 2024
- Xilinx, Inc.
- Nui CHONG
- G11 - INFORMATION STORAGE
Information Patent Application
DATA BUFFER CIRCUIT STRUCTURE, LAYOUT STRUCTURE OF MULTIPLE DATA BU...
- Publication number 20240428849
- Publication date Dec 26, 2024
- CXMT Corporation
- Yingdong GUO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND ITS OPERATION METHODS, MEMORY SYSTEMS, AND ELECTRONIC DE...
- Publication number 20240420756
- Publication date Dec 19, 2024
- Yangtze Memory Technologies Co., Ltd.
- Wei Huang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC
- Publication number 20240420757
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR SYSTEM FOR INPUTTING AND OUTPUTTING DATA
- Publication number 20240420758
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WTITE ASSIST SCHEME
- Publication number 20240412780
- Publication date Dec 12, 2024
- BIPRANGSHU SAHA
- G11 - INFORMATION STORAGE
Information Patent Application
COMPARISON OPERATIONS IN MEMORY
- Publication number 20240412775
- Publication date Dec 12, 2024
- Lodestar Licensing Group LLC
- Kyle B. Wheeler
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING A PAGE BUFFER
- Publication number 20240412776
- Publication date Dec 12, 2024
- SK HYNIX INC.
- Jong Seok JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20240404584
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- Ki-Heung Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for a Power Wake-Up Sequence In a Memory Device
- Publication number 20240404577
- Publication date Dec 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES
- Publication number 20240404581
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Ameen D. Akel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE MEMORY DEVICE
- Publication number 20240404580
- Publication date Dec 5, 2024
- Rambus Inc.
- Scott C. Best
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW POWER CLOCK INJECTION DURING IDLE MODE OPERATIONS
- Publication number 20240395311
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Noriaki Mochida
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE
- Publication number 20240395314
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Beau D. Barry
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFERED DYNAMIC RANDOM ACCESS MEMORY DEVICE
- Publication number 20240395315
- Publication date Nov 28, 2024
- Rambus Inc.
- Torsten Partsch
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLIER BASED DEVICE DEGRADATION READOUT CIRCUIT
- Publication number 20240386941
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Zhi Qi Huang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MODULE FOR PERFORMING ERROR CORRECTION OPERATION
- Publication number 20240386985
- Publication date Nov 21, 2024
- SK HYNIX INC.
- Mun Seon JANG
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE HAVING PAD ELECTRODE EQUIPPED WITH LOW PASS FI...
- Publication number 20240386942
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Nobuki Takahashi
- G11 - INFORMATION STORAGE
Information Patent Application
Proactive Usage-Based Disturbance Mitigation based on Resource Avai...
- Publication number 20240379147
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE

Input/output (I/O) data interface arrangements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Input buffer bias current control

Semiconductor device and memory

Interface device

Impedance matching circuit, method for impedance matching and semic...

Memory device and precharging method thereof

Load reduced memory module

Semiconductor memory devices and controller including adjustable st...

Parallel-to-serial conversion circuit, parallel-to-serial conversio...

Input buffer circuit and semiconductor memory

Application processors and electronic devices including the same

Programmable memory timing

Initializing memory systems

Apparatuses and methods for operations in a self-refresh state

Circuitry including a level shifter and logic, configured to receiv...

Signal routing between memory die and logic die

Apparatuses and methods for compensating for crosstalk noise at inp...

Yield recovery scheme for memory

Memory device and operation method thereof

High-bandwidth DDR DIMM, memory system, and operation method thereof

Signal sampling circuit and semiconductor memory device

High capacity memory system using standard controller component

Post package repair management

Frequency divider and memory device including the same

Semiconductor die for controlling on-die-termination of another sem...

Memory module with reduced read/write turnaround overhead

Transmission circuit, interface circuit, and memory

Three dimension memory device capable of improving sensing accuracy...

Apparatuses and methods for access based refresh operations

Multi-rail power transition

Memory power control by enable circuit

Patents Applicationslast 30 patents

MEMORY DEVICES CONFIGURED WITH ADAPTIVE WORD LINE PULSE ADJUSTMENT...

SELECTION CIRCUITRY

SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...

INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...

MEMORY DEVICE AND OPERATION METHOD THEREOF

MEMORY DEVICE PERFORMING TIMING SKEW AND OFFSET CALIBRATION

SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC DEVICES INCLUDING THE S...

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

DATA PROGRAMMING METHOD AND RELATED MEMORY CONTROLLER AND DATA STOR...

SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPER...

Dynamic Adjustment of Word Line Timing in Static Dynamic Random Acc...

8-T SRAM BITCELL FOR FPGA PROGRAMMING

DATA BUFFER CIRCUIT STRUCTURE, LAYOUT STRUCTURE OF MULTIPLE DATA BU...

MEMORY AND ITS OPERATION METHODS, MEMORY SYSTEMS, AND ELECTRONIC DE...

MEMORY DEVICE FOR WAFER-ON-WAFER FORMED MEMORY AND LOGIC

SEMICONDUCTOR SYSTEM FOR INPUTTING AND OUTPUTTING DATA

METHODS AND SYSTEMS TO INCREASE EFFICIENCY OF SRAM WTITE ASSIST SCHEME

COMPARISON OPERATIONS IN MEMORY

MEMORY DEVICE INCLUDING A PAGE BUFFER

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

Systems and Methods for a Power Wake-Up Sequence In a Memory Device

INTERFACE TECHNIQUES FOR STACKED MEMORY ARCHITECTURES

MULTI-DIE MEMORY DEVICE

LOW POWER CLOCK INJECTION DURING IDLE MODE OPERATIONS

APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE

BUFFERED DYNAMIC RANDOM ACCESS MEMORY DEVICE

MULTIPLIER BASED DEVICE DEGRADATION READOUT CIRCUIT

SEMICONDUCTOR MODULE FOR PERFORMING ERROR CORRECTION OPERATION

SEMICONDUCTOR DEVICE HAVING PAD ELECTRODE EQUIPPED WITH LOW PASS FI...

Proactive Usage-Based Disturbance Mitigation based on Resource Avai...