The embodiments of the semiconductor memory device according to the invention will be described in detail with reference to the accompanying drawings.
Hafnium oxide (YHO) 11 to which yttrium oxide is added in an amount of 8% is formed on a surface of the lower electrode 10, and a top electrode 12, the lower electrode 10, and the YHO 11 constitute the capacitor.
The method of forming the DRAM cell will be described in detail hereinafter.
Next, an interlayer dielectric is deposited on the structure shown in
A silicon oxide layer 102 is formed to have a thickness of 1 to 3 μm by a plasma CVD process. The silicon oxide layer 102 and the silicon nitride layer 101 of a portion 103 on which the capacitor is formed are removed by a photolithography process and a dry etching process to form a structure shown in
Next, titanium nitride that is to constitute the lower electrode 10 is deposited to have a thickness of 10 to 40 nm by the CVD process (see
Subsequently, an etch back process is performed in order to divide the lower electrode for each bit. After a positive type photoresist is applied onto the structure shown in
Furthermore, the silicon oxide layer 102 and the photoresist are removed by the wet etching process to form a lower electrode structure 10 where only the titanium nitride layer 104 having the cylinder shape is present (see
Subsequently, the YHO layer that is the main target of the invention is formed. First, the thin titanium oxide layer that is formed on the surface of the titanium nitride by the manufacturing process is removed with a buffered hydrofluoric acid. Subsequently, the hafnium oxide layer 11 to which yttrium is added in an amount of 8% is formed to have a thickness of 6 nm by means of the ALD process using a yttrium complex, a hafnium complex, and ozone (see
Since the deposition temperature is such low temperature, the oxidation of the surface of the titanium nitride or the crystallization of YHO may be suppressed. In particular, the low temperature is useful to the case where the addition amount of yttrium is less than about 10%.
If the addition amount of yttrium into the hafnium oxide layer 11 is small, the crystallization temperature of the hafnium oxide layer 11 is almost the same as that of hafnium oxide, and the crystallization occurs. Thus, it is difficult to maintain the amorphous state of the hafnium oxide layer 11, which is the main target of the invention. Furthermore, the addition amount of yttrium significantly affects the dielectric constant of the insulating layer in the final product. The connection of the layer formation temperature, the addition amount, the crystallization temperature, and the dielectric constant will be described in detail in a second embodiment below.
Further, a top electrode 12 is formed by means of the CVD process or the ALD process using titanium nitride. Preferably, the ALD process is used for forming the top electrode 12. The reason why the ALD process is preferably used for forming the top electrode 12 is as follows. The capacitor opening shown in
A tungsten layer 13 is formed on the titanium nitride layer by a sputtering process in order to reduce sheet resistance required as a plate electrode so as to produce the structure shown in
With respect to the capacitor opening having the diameter of 80 nm and the depth of 2 μm, an average storage capacitance of the capacitor is about 35 fF per bit in the case where hafnium oxide of 6 nm to which yttrium is added in an amount of 8% is used, and the capacitance enough to operate the DRAM memory cell can be ensured. Furthermore, when a voltage of 1 V is applied, the leak current is less than 1 fA per bit, the refresh current interval is desirably long, and the desirable yield or reliability can be ensured.
Meanwhile, it is impossible to ensure the above-mentioned advantages using pure hafnium oxide to which yttrium is not added. The two reasons why it is impossible are as follows. First, since it is necessary to form the thin film of hafnium oxide to have a thickness of about 3 nm in the case where the thin film is formed without adding yttrium into the hafnium oxide to ensure the same level of capacitance as the case yttrium is added into the hafnium oxide, the leak current of the capacitor is increased. Thus, it is impossible to operate the chip. Furthermore, in the case where the height of the capacitor is increased while the thickness of the film of hafnium oxide is 6 nm as same as the case yttrium is added into the hafnium oxide, it is required that the height of the capacitor is 3.5 μm or more to ensure the desired capacitance. The above-mentioned process is problematic in that since it is difficult to process the opening 103 shown in
In this embodiment, the dielectric characteristics and the reliability of the capacitor that is produced using hafnium oxide to which yttrium is added will be described in detail.
With respect to pure hafnium oxide and hafnium oxide to which yttrium is added in an amount of 8%, the relation of SiO2 effective oxide thickness dEQ and the physical thickness dPHY was examined using the plane capacitor in which the lower electrode was made of titanium nitride, and the obtained results are shown in
Since the vertical axis of
Furthermore, it should be noted that the increase in dielectric constant is ensured without the substantial crystallization. In
The reason for the above-mentioned tendency is thought that the very thin titanium oxide layer is formed on the surface of the lower electrode during the crystallization process, and it is equivalent to that the entire film thickness is increased. As described below, the thin titanium oxide layer may affect the reduction in reliability of the capacitor to no small extent.
In addition, the use of YHO as an amorphous material gives an effect to lower the lower limit of the physical thickness available in the invention. In general, it is known that in the case of the capacitor of the thin film dielectric material, if the thickness of the insulating film is about 3.5 nm or less, the direct tunneling current is observed. In the case where the crystallization occurs, the nonuniformity of the film thickness occurs due to the grain growth, and the direct tunneling current is observed in a large amount even in the thicker film. This can be minimized by using the amorphous material, and the lower limit of the thin film may be about 5 nm.
In the invention, it is considered that the formation of YHO in the DRAM memory cell without the crystallization of YHO is preferable. Thus, it was considered to perform the formation process at low temperatures. When the formation in the DRAM memory structure was performed, if the addition amount of yttrium was 8% and the film thickness was 8 nm, the temperature at which the crystallization of YHO started was estimated as about 500° C. The temperature about 500° C.” was almost the same as the temperature in the case where the pure hafnium oxide was used. In the case of the planar capacitor structure, the amorphous state of YHO was sometimes maintained at higher temperatures. However, in the case of the three-dimensional capacitor, the threshold temperature at which the crystallization started was slightly lower and was about 500° C. due to the temperature distribution or the stress caused by the structural characteristics.
Among the factors of the temperature, the temperature for the deposition process of the insulating film most significantly affected the crystallization, and the crystallization often occurred even in the deposition condition of about 450° C. From the above-mentioned test results, it can be seen that it is necessary to set the temperature for the deposition process of the insulating film so that the thin film is desirably formed and to perform the process at sufficiently low temperatures after the deposition including the deposition of the top electrode in order to form the amorphous YHO with a predetermined margin.
In order to achieve this, the ALD process is used in the invention to perform the deposition of the insulating film, and complex materials and active ozone are used as precursors to perform the ALD reaction at low temperature. Accordingly, the temperature for the ALD reaction may be reduced to 250° C. or so. After the deposition, it is necessary to suppress the heat treatment that is performed to remove the remaining impurity, and to desirably set the feeding time of ozone used to decompose the raw materials so that the impurity is removed as many as possible during the deposition process. If the treatment after the deposition is required, the ozone treatment is additionally performed at 400° C. or less, which ends the treatment after the deposition.
When the top electrode is deposited, YHO may be crystallized. As the deposition process of the top electrode, a CVD process has been conventionally performed using ammonia and titanium tetrachloride. A typical temperature for such deposition process was 600° C. or so, at which the crystallization of YHO tends to start. Therefore, it is necessary to adopt the low temperature process such as the ALD process.
Next, the reliability of the capacitor that is formed through the above-mentioned procedure will be described. After the deposition of YHO, the following three samples were tested in views of time dependent dielectric breakdown (TDDB): the capacitor (c-YHO) in which YHO was crystallized by the heat treatment at 700° C.; the capacitor (a-YHO) in which the amorphous state of YHO was maintained by using the low temperature process; and the capacitor (pc-YHO) in which the top electrode is formed by a conventional CVD process so that the partial crystallization of YHO occurred. The obtained results are shown in
First, in the case of the film of
In the case of the YHO (pc-YHO) that were partially crystallized, the reduction in yield of the capacitor even more significantly affects the yield of the DRAM products, and the samples where the lifetime distribution of the capacitor is broadened and the short circuit occurs are obtained. The reason for this result can be thought that since chlorine (obtained from titanium tetrachloride) or reduction gas (ammonia) is contained in a CVD atmosphere when the top electrode is formed by the conventional CVD process, the speed of the deterioration of the grain boundary is further increased.
The above-mentioned phenomenon was shown in the case of
From the TDDB evaluation results with regard to the two kind of film thicknesses, it can be seen that it is necessary to perform the cell manufacturing process where the partial crystallization of YHO is avoided in order to form YHO of the invention with high reliability.
Meanwhile, an ozone feeding step time required to remove the impurity may not be sufficiently ensured due to the limited throughput in the formation of YHO. In such case, it is more preferable to perform the intentional crystallization before the top electrode is deposited in comparison with the performing of the incomplete crystallization (see
In this embodiment, metal ruthenium is used as the electrode. Ruthenium is advantageous in that the work function is high and the leakage current of the capacitor is lower than titanium nitride. Meanwhile, in comparison with titanium nitride, the reactivity of ruthenium to silicon is higher so that the structure in which the electrode made of ruthenium comes into contact with polysilicon is not suitable.
For this reason, as shown in
Meanwhile, YHO of the invention is advantageous in that the dielectric constant is high even in the amorphous state so that it is possible to form the structure including the lower electrode 201 made of metal ruthenium with a desirable margin. YHO of the invention may be formed at the very low temperature of 300° C. or less, and there is the margin of 300° C. or more in respect to the heat resistance of the lower electrode. The heat treatment process to remove the impurity may be performed at the low temperature of, e.g. 400° C.
Like the lower electrode 201, the top electrode 203 may be made of ruthenium. As described in the first embodiment, since a demand for step coverage is severe in respect to the top electrode 203, the tope electrode 203 should be formed by the ALD process.
In comparison with the case of the titanium nitride electrode, if the ruthenium is used as the electrode, even though the thin film is formed to have the physical thickness of about 20%, an increase in direct tunneling current can be suppressed in a low electric field.
Number | Date | Country | Kind |
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2006-091429 | Mar 2006 | JP | national |