Claims
- 1. A semiconductor processing method comprising:providing a substrate; providing an outer layer of Si3N4 outwardly of the substrate, the outer Si3N4 layer having an outer surface; providing the substrate having the Si3N4 layer within a chemical vapor deposition reactor; feeding a gaseous silicon containing precursor to the reactor under conditions effective to deposit a silicon layer over the Si3N4 layer outer surface, the deposited silicon layer being provided to a thickness of less than or equal to about 30 Angstroms; and forming a layer of photoresist in physical contact with the deposited silicon layer.
- 2. The method of claim 1 wherein the silicon containing precursor is dichlorosilane.
- 3. A semiconductor processing method comprising:providing a substrate; providing an outer layer of Si3N4 outwardly of the substrate, the outer Si3N4 layer having an outer surface; providing the substrate having the Si3N4 layer within a chemical vapor deposition reactor; feeding a gaseous silicon containing precursor to the reactor under conditions effective to deposit a silicon layer over the Si3N4 layer outer surface, the deposited silicon layer being provided to a thickness of from about 10 Angstroms to about 30 Angstroms; and forming a layer of photoresist in physical contact with the deposited silicon layer.
- 4. The method of claim 3 wherein the silicon containing precursor is dichlorosilane.
RELATED PATENT DATA
This patent resulted from a divisional application of U.S. Pat. application Ser. No. 09/295,642, now U.S. Pat. No. 6,297,171, which was filed Apr. 20, 1999, which is a continuation application of U.S. Pat. application Ser. No. 08/567,090, which was filed Dec. 4, 1995, now U.S. Pat. No. 5,926,739.
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Continuations (1)
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Number |
Date |
Country |
Parent |
08/567090 |
Dec 1995 |
US |
Child |
09/295642 |
|
US |