1. Field of the Invention
The present invention relates to a semiconductor structure combination and a manufacture thereof. More particularly, the present invention relates to a semiconductor structure combination for a thin-film solar cell.
2. Description of the Prior Art
Solar cells are extensively employed because of being capable of converting the accessible energy, emitted from a light source such as the sun, to electricity to operate electronic equipments such as calculators, computers, and heaters.
The principle of the solar cells can be explained as follows. Each photon of the light penetrates into and is absorbed by a silicon substrate, for transferring its energy to an electron in a bound state (covalent bond) and thereby releasing a bound electron to be a free one. The movable electrons and the holes lead to a current flow in the solar cells. In order to contribute to the current, the electrons and holes cannot recombine with each other but rather are separated by the electric field associated with the p-n junction inside the silicon substrate.
It is known that the formation of a passivation layer on the surface of the solar cell can decrease the carrier recombination at the surface.
At present, solar cells are mainly made of silicon. Based on the different crystal structures, solar cells can be divided into single-crystal silicon solar cells, polycrystal silicon solar cells, and amorphous silicon solar cells (i.e. thin-film solar cells).
In general, the amorphous silicon is deposited, by the plasma enhanced chemical vapor deposition (PECVD), on a substrate (e.g. a glass substrate) to grow a layer of amorphous silicon thin film. Since the absorption coefficient of the amorphous silicon is higher than that of the single-crystal silicon, only a quite thin layer of the amorphous silicon is required to effectively absorb the light. The advantage of the amorphous silicon solar cell is that cheaper substrates, such as glass, ceramic, or metal substrates, can be used instead of expensive crystalline silicon substrates, which reduces the material cost greatly and makes it possible for productions of large-dimension solar cells. In contrast, the dimension of the crystalline silicon solar cell is limited by the size of the silicon wafer.
For the large-dimension amorphous silicon solar cell, a passivation layer on the surface of the solar cell is also needed to decrease the carrier recombination at the surface. Therefore, to solve the aforementioned problems, the main scope of the invention is to provide a semiconductor structure combination for a thin-film solar cell and a manufacture thereof.
One scope of the invention is to provide a semiconductor structure combination for a thin-film solar cell and a manufacture thereof.
According to an embodiment of the invention, the semiconductor structure combination includes a substrate, a multi-layer structure, and a passivation layer.
The substrate has an upper surface. The multi-layer structure is deposited on the upper surface of the substrate and includes a p-n junction, a p-i-n junction, an n-i-p junction, a tandem junction or a multi-junction. The passivation layer is deposited by an atomic layer deposition process and/or a plasma-enhanced (or a plasma-assisted) atomic layer deposition process on a top-most layer of the multi-layer structure.
It is related to a method of fabricating a semiconductor structure combination for a thin-film solar cell according to another embodiment of the invention.
First, a substrate having an upper surface is prepared. Subsequently, a multi-layer structure is deposited on the upper surface of the substrate and includes a p-n junction, a p-i-n junction, an n-i-p junction, a tandem junction or a multi-junction. Afterwards, by an atomic layer deposition process and/or a plasma-enhanced (or a plasma-assisted) atomic layer deposition process, a passivation layer is deposited on a top-most layer of the multi-layer structure.
Compared to the prior art, inside the semiconductor structure combination for the thin-film solar cell according to the invention, the high-quality surface passivation layer can be deposited, by the atomic layer deposition process, on the silicon thin film with an excellent deposition uniformity and an excellent three-dimensional conformality, to eliminate the effect of dangling bonds and defects. In particular, for the silicon thin film consisting of pinholes and microcrystalline structures, the passivation layer can be deposited, due to the excellent three-dimensional conformality of the atomic layer deposition process, between the pinholes and grain boundaries of the microcrystalline structures in the silicon thin film layer to function effectively.
The advantage and spirit of the invention may be understood by the following recitations together with the appended drawings.
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In practical applications, the multi-layer structure 12 can include a p-i-n junction (i means the intrinsic silicon without an n-type or a p-type dopant), an n-i-p junction, a tandem junction or a multi-junction. The passivation layer 14 can be deposited on a top-most layer of the multi-layer structure 12.
In practical applications, the passivation layer 14 can be deposited by an atomic layer deposition process and/or a plasma-enhanced (or a plasma-assisted) atomic layer deposition process on the top-most layer of the multi-layer structure 12.
Please refer to table 1 below. Table 1 illustrates a look-up table of the compositions and the precursors of the passivation layer 14. As shown in table 1, in practical applications, the passivation layer 14 can be made of Al2O3 AlN HfO2 Hf3N4 Si3N4 SiO2 Ta2O5 TiO2 TiN ZnO ZrO2 Zr3N4, other similar compounds, or a mixture of the aforementioned compounds, but not limited herein.
In one embodiment, if the passivation layer 14 is an Al2O3 thin film, the precursors of the Al2O3 thin film can be Trimethylaluminum (Al(CH3)3, TMA) and H2O vapor, where the Al element is from TMA, and the O element is from H2O.
Taking the deposition of the Al2O3-based passivation layer 14 as an example, an atomic layer deposition cycle includes four reaction steps of:
1. Using a carrier gas to carry H2O molecules into the reaction chamber, thereby the H2O molecules are absorbed on the upper surface of the substrate to form a layer of OH radicals, where the exposure period is 0.1 second;
2. Using a carrier gas to purge the H2O molecules not absorbed on the substrate, where the purge time is 5 seconds;
3. Using a carrier gas to carry TMA molecules into the reaction chamber, thereby the TMA molecules react with the OH radicals absorbed on the upper surface of the substrate to form one monolayer of Al2O3, wherein a by-product is organic molecules, where the exposure period is 0.1 second; and
4. Using a carrier gas to purge the residual TMA molecules and the by-product due to the reaction, where the purge time is 5 seconds.
The carrier gas can be highly-pure argon or nitrogen. The above four steps, called one cycle of the atomic layer deposition, grows a thin film with single-atomic-layer thickness on the whole area of the substrate. This characteristic is called self-limiting capable of controlling the film thickness with a precision of one atomic layer in the atomic layer deposition. Thus, controlling the number of cycles of atomic layer deposition can precisely control the thickness of the Al2O3 passivation layer.
In conclusion, the atomic layer deposition process adopted by the invention has the following advantages: (1) able to control the formation of the material in nano-metric scale; (2) able to control the film thickness more precisely; (3) able to have large-area production; (4) having excellent uniformity; (5) having excellent conformality; (6) having pinhole-free structure; (7) having low defect density; and (8) low deposition temperature, etc.
The deposition of the passivation layer 14 can be performed at a processing temperature ranging from room temperature to 600° C. After the deposition of the passivation layer 14, the passivation layer 14 can be further annealed at an annealing temperature ranging from 300° C. to 1200° C. to improve the quality of the passivation layer 14. In practical applications, the passivation layer 14 can have a thickness in a range of 1 nm to 100 nm.
To sufficiently disclose the content of the invention, three embodiments are listed below. Please refer to
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Please be noted that the explanations of the aforementioned three embodiments are used to describe the characteristic and spirit of the invention, but not to limit the scope of the invention.
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In practical applications, the passivation layer 14 can be made of Al2O3, AlN, HfO2, Hf3N4, Si3N4, SiO2, Ta2O5, TiO2, TiN, ZnO, ZrO2, Zr3N4, other similar compounds, or a mixture of the aforementioned compounds, but not limited herein. In addition, the passivation layer 14 can have a thickness in a range of 1 mm to 100 nm.
Compared to the prior art, inside the semiconductor structure combination for the thin-film solar cell according to the invention, the high-quality surface passivation layer can be deposited, by the atomic layer deposition process, on the silicon thin film with an excellent deposition uniformity and an excellent three-dimensional conformality, to eliminate the effect of dangling bonds and defects. In particular, for the silicon thin film consisting of pinholes and microcrystalline structures, the passivation layer can be deposited, due to the excellent three-dimensional conformality of the atomic layer deposition process, between the pinholes and grain boundaries of the microcrystalline structures in the silicon thin film layer to function effectively.
With the example and explanations above, the features and spirits of the invention will be hopefully well described. Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Number | Date | Country | Kind |
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097117665 | May 2008 | TW | national |