Semiconductor structures including accumulations of silicon boronide and related methods

Information

  • Patent Application
  • 20070215959
  • Publication Number
    20070215959
  • Date Filed
    March 05, 2007
    17 years ago
  • Date Published
    September 20, 2007
    17 years ago
Abstract
A semiconductor device may include a semiconductor substrate, first and second source/drain regions on a surface of the semiconductor substrate, and a channel region on the surface of the semiconductor substrate with the channel region between the first and second source/drain regions. An insulating layer pattern may be on the channel region, a first conductive layer pattern may be on the insulating layer, and a second conductive layer pattern may be on the first conductive layer pattern. The insulating layer pattern may be between the first conductive layer pattern and the channel region, and the first conductive layer pattern may include boron doped polysilicon with a surface portion having an accumulation of silicon boronide. The first conductive layer pattern may be between the second conductive layer pattern and the insulating layer pattern, and the second conductive layer pattern may include tungsten. Related methods are also discussed.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a cross-sectional view illustrating a transistor according to some embodiments of the present invention.



FIGS. 2 to 5 are cross-sectional views illustrating methods of manufacturing the transistor of FIG. 1 according to some embodiments of the present invention.



FIG. 6 is a cross-sectional view illustrating a transistor according to some other embodiments of the present invention.



FIGS. 7 to 8 are cross-sectional views illustrating methods of manufacturing the transistor of FIG. 6 according to some embodiments of the present invention.



FIG. 9 is a graph illustrating inversion capacitances.


Claims
  • 1. A semiconductor device comprising: a semiconductor substrate;an insulating layer pattern on the substrate;a first conductive layer pattern on the insulating layer pattern so that the insulating layer pattern is between the first conductive layer pattern and the substrate, wherein the first conductive layer pattern includes boron doped polysilicon and a surface portion having an accumulation of silicon boronide; anda second conductive layer pattern on the first conductive layer pattern so that the first conductive layer pattern is between the second conductive layer pattern and the insulating layer pattern, wherein the second conductive layer pattern includes tungsten.
  • 2. The semiconductor device according to claim 1 further comprising: first and second source/drain regions on a surface of the semiconductor substrate on opposite sides of the first conductive layer pattern; anda channel region on the surface of the semiconductor substrate, wherein the channel region is between the first and second source/drain regions.
  • 3. The semiconductor device according to claim 1 wherein the surface portion of the first conductive layer pattern has a first concentration of boron, wherein a portion of the boron doped polysilicon adjacent the insulating layer pattern has a second concentration of boron, and wherein the first concentration is significantly greater than the second concentration.
  • 4. The semiconductor device according to claim 1 further comprising: an adhesion film pattern between the first and second conductive layer patterns; anda barrier film pattern between the adhesion film pattern and the second conductive layer pattern.
  • 5. The semiconductor device according to claim 4 wherein the adhesion film pattern includes tungsten silicide, and wherein the barrier film pattern includes tungsten nitride.
  • 6. The semiconductor device according to claim 4 wherein the adhesion film pattern has a thickness of about 5 nm and wherein the barrier film pattern has a thickness of about 5 nm.
  • 7. The semiconductor device according to claim 4 further comprising: a second adhesion film pattern between the barrier film pattern and the second conductive layer pattern.
  • 8. The semiconductor device according to claim 7 wherein the second adhesion film pattern comprises tungsten silicide.
  • 9. The semiconductor device according to claim 7 wherein the second adhesion film pattern has a thickness of about 5 nm.
  • 10. The semiconductor device according to claim 1 wherein the surface portion of the first conductive layer pattern has an accumulation of SiB4 and/or SiB6.
  • 11. The semiconductor device according to claim 1 wherein the first conductive layer pattern has a thickness of about 60 nm and wherein the second conductive layer pattern has a thickness of about 50 nm.
  • 12. A semiconductor device comprising: a semiconductor substrate;first and second source/drain regions on a surface of the semiconductor substrate;a channel region on the surface of the semiconductor substrate, wherein the channel region is between the first and second source/drain regions;a gate insulating layer pattern on the channel region;a first conductive layer pattern on the gate insulating layer pattern so that the gate insulating layer pattern is between the first conductive layer pattern and the channel region, wherein the first conductive layer pattern includes doped polysilicon;an adhesion film pattern on the first conductive layer pattern so that the first conductive layer pattern is between the adhesion film pattern and the gate insulating layer pattern, wherein the adhesion film pattern includes tungsten silicide;a barrier film pattern on the adhesion film pattern so that the adhesion film pattern is between the barrier film pattern and the first conductive layer pattern, wherein the barrier film pattern includes tungsten nitride; anda second conductive layer pattern on the barrier film pattern so that the barrier film pattern is between the second conductive layer pattern and the adhesion film pattern, wherein the second conductive layer pattern includes tungsten.
  • 13. The semiconductor device according to claim 12 wherein the first conductive layer pattern includes a surface portion adjacent the adhesion film pattern wherein the surface portion has an accumulation of silicon boronide.
  • 14. The semiconductor device according to claim 13 wherein the surface portion has an accumulation of SiB4 and/or SiB6.
  • 15. The semiconductor device according to claim 13 wherein the first conductive layer pattern includes boron doped polysilicon and wherein the surface portion of the first conductive layer has a first concentration of boron, wherein a portion of the boron doped polysilicon adjacent the gate insulating layer has a second concentration of boron, and wherein the first concentration is significantly greater than the second concentration.
  • 16. The semiconductor device according to claim 12 further comprising: a second adhesion film pattern between the barrier film pattern and the second conductive layer pattern, wherein the second adhesion film pattern includes tungsten silicide.
  • 17. A method of forming a semiconductor device, the method comprising: forming an insulating layer on a semiconductor substrate;forming a first conductive layer on the insulating layer so that the insulating layer is between the first conductive layer and the semiconductor substrate, wherein the first conductive layer includes boron doped polysilicon and a surface portion having an accumulation of silicon boronide;forming a second conductive layer on the first conductive layer so that the first conductive layer is between the second conductive layer and the insulating layer, wherein the second conductive layer includes tungsten;patterning the insulating layer and the first and second conductive layers.
  • 18. The method according to claim 17, further comprising: forming first and second source/drain regions on opposite sides of the patterned first conductive layer.
  • 19. The method according to claim 17 wherein forming the first conductive layer includes forming a polysilicon layer and doping the polysilicon layer using a beam of ions including boron.
  • 20. The method according to claim 19 wherein forming the polysilicon layer includes forming an n-type polysilicon layer.
  • 21. The method according to claim 19 wherein the beam of ions includes B18H22 and/or B10H12.
  • 22. The method according to claim 21 wherein a source of the ions is in a gaseous state.
  • 23. The method according to claim 19 wherein the beam of ions including boron is provided at an dose in the range of about 3*1016 ion/cm2 to about 6*1016 ion/cm2.
  • 24. The method according to claim 19 wherein the beam of ions including boron is provided at an energy in the range of about 40 keV to about 60 keV.
  • 25. The method according to claim 17 wherein the surface portion of the first conductive layer has a first concentration of boron, wherein a portion of the boron doped polysilicon adjacent the insulating layer has a second concentration of boron, and wherein the first concentration is significantly greater than the second concentration.
  • 26. The method according to claim 17 further comprising: before forming the second conductive layer, forming an adhesion film on the first conductive layer so that the first conductive layer is between the adhesion film and the insulating layer, wherein the adhesion film includes tungsten silicide; andforming a barrier film on the adhesion film so that the barrier film is between the adhesion film and the second conductive layer, wherein the barrier film includes tungsten nitride.
  • 27. The method according to claim 26 further comprising: before forming the second conductive layer, forming a second adhesion film on the barrier film so that the second adhesion film is between the barrier film and the second conductive layer, wherein the second adhesion film includes tungsten silicide.
  • 28. The semiconductor device according to claim 17 wherein the surface portion of the first conductive layer pattern has an accumulation of SiB4 and/or SiB6.
Priority Claims (1)
Number Date Country Kind
2006-21581 Mar 2006 KR national