The present invention relates to a testing apparatus using an electron beam or optical laser for testing of semiconductor devices, substrates, photomasks (exposure masks), etc., having minute patterns.
With recent evolution of further microfabrication and denser integration of semiconductor integrated circuits, testing of patterns created on semiconductor wafers is performed at the end of every manufacturing process to detect early or in advance any abnormality and/or any fault involved in the manufacturing process of these semiconductor integrated circuits. Such defect testing method and apparatus are put into practice use. In the testing apparatus of this kind, testing is performed by acquiring image information with respect to a region to be tested by means of a Scanning Electron Microscope (hereinafter abbreviated to SEM) using an electron beam technology.
A Critical-Dimension SEM, hereinafter referred to as a CD-SEM, which is a SEM using the electron beam technology specialized for semiconductors, is used for dimensional control of process patterns in the production of semiconductor integrated circuits. The CD-SEM carries out observing process patterns and measuring their dimensions with high precision.
In the process management in terms of a yield rate and other parameters of semiconductor integrated circuits, a testing apparatus such as, for example, a DR-SEM (Defect Review SEM) is used to detect a defect in the patterns of elements in a chip by means of a SEM using the electron beam technology.
In apparatus using any of these scanning electron microscopes (SEMs), a region to be inspected on a semiconductor wafer is scanned by electron beam irradiation which takes place sequentially along a plurality of scan lines with a predetermined acceleration voltage, image information for the region to be inspected is acquired by detecting secondary electrons reflected from there, and testing of the region to be inspected is performed based on the acquired image information. However, along with increased diameter and further fineness of circuit patterns of recent semiconductor wafers, increasing the throughput of the apparatus is required. Especially, 450-mm wafers are expected to be developed in the time to come and there is a noticeable tendency toward increasing the wafer diameter. Due to this, the foregoing testing apparatus will encounter a problem that an X-Y stage for controlling a beam irradiation position needs to be enlarged, which, in turn, increases the weight of the apparatus and entails an additional cost. In order to increase the throughput, it is necessary that a region to be inspected is positioned in a beam irradiation position promptly and accurately, electron beam scanning control is implemented at a higher speed, and acquired image information is processed at a higher speed.
“Patent Document 1” describes a related art apparatus for wafer testing using a SEM for inspecting a wafer, while moving a stage in X and Y directions. “Patent Document 2” describes a technique in which a plurality of wafers are mounted on a stage and a defect is detected by rotating the stage and comparing the images of both wafers.
Because of the fact that the stage is made larger and heavier due to increased diameter of recent semiconductor wafers, the following problems are emerging: (1) complexity of control for accelerating and decelerating the stage; (2) a decrease in the throughput (an acceleration limit attributed to increased weight→a high torque limit of the motor); and (3) increased vibration of the stage support platform during the stage inversion operation (deterioration in resolution).
An object of the present invention is to make it feasible for apparatus for inspecting circuit patterns to avoid the stage from becoming larger due to increased diameter of wafers, to achieve downsizing, weight saving, and cost reduction, and achieve an improvement in the resolution for measurement and high throughput.
To solve the above-mentioned problems, the apparatus is configured with a stage that holds, rotates, and moves a wafer; means for irradiating the surface of the wafer that is rotated and moved by the stage by an electron beam; means for detecting secondary electrons that are generated from the wafer by the irradiating means; means for controlling scanning taking a rotation angle of the wafer into account; and means for acquiring image information based on the detected signals.
Likewise, the apparatus is configured with a stage that holds, rotates, and moves a wafer; means for irradiating the wafer, the surface which is rotated and moved by the stage, by an electron beam; means for detecting secondary electrons that are generated from the wafer by the irradiating means; means for controlling scanning with the electron beam; means for reordering acquired images taking a rotation angle of the wafer into account; and means for acquiring image information based on the detected signals.
According to the present invention, it is possible to reduce the size and the weight of the stage that holds a wafer and moves it to an irradiation region. It is also possible to improve the testing throughput by precluding a decrease in the throughput due to an acceleration limit (a high torque limit of the motor) attributed to increased weight of the stage of related art (what is called the X-Y stage) which makes movement in X-axis and Y-axis directions from an origin. The X-Y stage involves an inversion movement that is now eliminated by the present invention. Thus, the present invention makes it possible to reduce the vibration of the stage support platform and improve the resolution and precision of the testing.
In the following, the present invention will be described in detail using its exemplary embodiments.
An exemplary embodiment of a pattern testing apparatus for semiconductor wafers pertaining to the present invention is described using the drawings.
The image processing unit 15 includes an AD conversion 16, an image data realignment unit 17, an image processor 18, and a scan control unit 21. The scan control unit 21 includes a fundamental coordinate generation unit 22 which generates coordinates representing an electron beam irradiation position, a rotation angle coordinate conversion unit 26 which calculates a correction value of electron beam scan coordinates from stage rotation angle information, an X-coordinate conversion unit 24 and a Y-coordinate conversion unit 25 which perform X-axis coordinate conversion and Y-axis coordinate conversion, respectively, based on correction values depending on an electron beam scan method and correction value information from the rotation angle coordinate conversion unit 26 with respect to coordinates generated by the fundamental coordinate generation unit 22, a control circuit 23 which controls operating timing and data transfer between each component in the scan control unit 21, and an output unit 27 which outputs coordinates information for control of an electron beam scan direction.
The stage 4 includes a stage operating part 5 which makes movements along X-axis and Y-axis and rotational movement and a wafer 6 to be inspected is mounted and held on the stage operating part 5. The scanning electron microscope (SEM) includes an electron gun 3 which emits an electron beam, a scanning coil 2 which controls a position of irradiation of an electron beam emitted from the electron gun 3, an objective lens 7 which controls the beam diameter by controlling the focus of the electron beam, and a secondary electron detector 8 which detects secondary electrons 9 reflected from a specimen as a result of electron beam irradiation. However, the SEM structure is general and schematically depicted here with its essential parts only shown.
In order to detect early or in advance any abnormality and/or any fault involved in the manufacturing process of semiconductor integrated circuits, testing is performed with the use of a testing apparatus at the end of every manufacturing process. A method for testing is to irradiate a specimen by a beam, while beam scanning along a direction of imaging takes place, and acquire image information for a region to be inspected. First, the operation of the scan control unit 21 is described.
Fundamental coordinates for an image size to be acquired are generated by the fundamental coordinate generation unit 22 in the scan control unit 21. For example, if the image size is 512×516, fundamental coordinates are generated as follows: first, X coordinates from 0 to 511 are serially generated with an Y coordinate of 0; likewise, X coordinates from 0 to 511 are then serially generated with an Y coordinate of 1; and this is repeated until corresponding X coordinates have been generated with a Y coordinate of 511. Normally, these fundamental coordinates are used directly as scan coordinates and the scan coordinates are input to the electron beam control unit 11 so that they are scanned by the electron beam.
Here, for scanning in an arbitrary direction, through the use of the X-coordinate conversion unit 24 and the Y-coordinate conversion unit 25, the fundamental coordinates are converted to arbitrary coordinates as the scan coordinates which are input to the electron beam control unit 11 so that they are scanned by the electron beam. In the SEM 1, based on the scan coordinates from the electron beam control unit 11, a specimen such as a semiconductor wafer (e.g., 6 in the figure) is irradiated by the electron beam, secondary electrons 9 reflected from the specimen are detected, and detected signals are output to the image generation unit 10.
In the image generation unit 10, the detected signals are converted to image signals and the image signals are input to the image processing unit 15. In the image processing unit 15, by the AD conversion 16, the input image signals which are analog signals are converted to digital signals which serve as image data. In some configurations, however, analog signals may be A-D converted outside the image processing unit. Image data resulting from the conversion is reordered by the image data realignment unit 17.
Here, when the SEM performed scanning in an arbitrary direction or scanning in accordance with a rotation of the wafer, which will be described later, the obtained image data is reordered into an order suitable for image processing operation by the image processor 18, based on the scan coordinates generated by the scan control unit 21. The image processor 18 executes image processing based on the image data input thereto and sends data to the overall control unit 28. The overall control unit 28 displays image data processed by the image processing and, based on the acquired image information, performs a testing process such as detecting any abnormality and/or any fault involved and measuring the dimensions of process patterns.
By the process as described above, it becomes possible to inspect a wafer while rotating it by implementing scan control and imaging, while rotating the stage operating part 5, and conversion of scan coordinates based on information for a rotation angle of the wafer 6. While an example of testing utilizing electron beam irradiation has been illustrated in the present embodiment, optical laser irradiation can also be implemented with the image processing unit 15 and the stage control unit 12 configured similarly.
From the acquired image, the coordinates within the area to be inspected are corrected by the image data realignment unit 17, based on a rotation angle of the area to be inspected, relative to the reference coordinates. Base on the result of this, only the area to be inspected is extracted from the acquired image. The coordinate calculation based on a rotation angle is the same as the embodiment shown in
In the example of
However, if there is a center point offset, the mark images do not match, and the offset can thus be detected. In the example of
X-coordinate and Y-coordinate conversion is performed by storing mapping data for conversion in advance in the conversion tables (LUTs). The conversion tables are memories and conversion data is stored in the memories. A pair of fundamental coordinates generated by the fundamental coordinate generation unit 22 specifies an address. By reading data stored at the address, coordinate conversion is performed.
Here, the capacity of a small-capacity conversion table is equivalent to an image size. If, for example, one pixel is represented by 16-bit digital data in an image size of 512×512, the capacity will be 16 bits×512=8192 bits. Since this is provided for X coordinate and Y coordinate respectively, there are two conversion tables with the capacity of 8192 bits. Owing to the fact that the small-capacity conversion table (LUT) has a minimum memory capacity corresponding to an image size, high-speed operation is feasible.
In the large-capacity conversion table (LUT) 91, scan type specific conversion data is stored to handle a plurality of scan types. During a scan operation, high-speed coordinate conversion is performed using the small-capacity conversion tables 92, 93. During a pause of scan, conversion data is transferred from the large-capacity conversion table (LUT) 91 to the small-capacity conversion tables 92, 93. Thereby, a large variety of scan coordinates can be generated depending on a rotation angle with fewer hardware resources.
In
According to the method as in
As described hereinbefore, according to the present invention, it is possible to reduce the size and the weight of the stage that holds a wafer and moves it to an irradiation region. It is also possible to improve the testing throughput by precluding a decrease in the throughput due to an acceleration limit (a high torque limit of the motor) attributed to increased weight of the stage of related art. Such stage involves an inversion movement that is now eliminated by the present invention. Thus, the present invention makes it possible to reduce the vibration of the stage support platform and improve the resolution and precision of the testing.
Number | Date | Country | Kind |
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2008-317105 | Dec 2008 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2009/004722 | 9/18/2009 | WO | 00 | 7/26/2011 |