The present invention relates generally to semiconductor designs, and more particularly to a semiconductor wafer with a protection structure against damage during a die separation process.
Integrated circuits (ICs) are produced on round semiconductor wafers. After production and electrical testing, the wafer is divided into rectangular IC chips, a.k.a. dies, by a rotary sawing operation. Provision for this operation is made with narrow scribe channels. These channels are also called scribe bands because of the history of diamond scribing. The scribe bands are sacrificial and are consumed as a “kerf loss” in the sawing operation. Dies successfully separated by the sawing operation are cleaned and delivered for bonding into a market-recognizable packaging.
During the IC design stage, the scribe bands appear as wasted space. However, that space on a semiconductor wafer has other production values. For example, that space is utilized for the construction of process control monitors (PCMs) that allow the monitoring of the many complex processes in semiconductor fabrication. Any one of these PCMs, along with any connected electric probe pads, appears, as a PCM pattern, in pattern groups. Typically, they are tested before the wafer is sawed into individual dies and the data made available by the testing are fed back to the production system to keep one or more production processes operating within specifications. These data also qualify or disqualify the wafer as having a reasonable yield of good dies. The bad dies on the wafer are marked or mapped so that only good dies move into the packaging stage.
However, the sawing operation is a relatively coarse process and damage to dies can occur since they are adjacent to the scribe bands. Damage can include, for example, flaking or chipping at the edge of a die. Damage can also include cracks that propagate into the edges and beyond, and delamination of layers of film structures.
To counter these difficulties, seal ring structures are constructed to limit or stop the progress of the damage into the critical core areas of the die. Seal rings are typically constructed within all the edges of each die, and are able to protect sensitive chip areas from one or more of the above-mentioned damages. However, with the rise of the use of new materials, additional difficulties emerge. For example, in order to reduce the speed-limiting capacitance between metal interconnection lines on the face of ICs, low-K (low dielectric constant) dielectric materials are now commonly used. Low-K dielectrics, however, have different mechanical properties than do the traditional oxide dielectrics. Because they have different stiffness properties, and weaker bonding abilities to other layers, low-K materials are more prone to delamination under the kind of stress that can be produced by sawing. This means that the PCMs, which includes low-K materials in their construction, are more likely to cause damage that progresses into dies neighboring the scribe band.
Therefore, desirable in the art of semiconductor designs are additional structures to prevent damage occurred to a die, during a die separation process.
In view of the foregoing, the following provides a semiconductor wafer adapted to prevent damage during a die separation process. In one embodiment, the semiconductor wafer includes one or more dies, each of which has a boundary surrounding an integrated circuitry for separating one from another. One or more pattern units are disposed adjacent to the die for monitoring a fabrication process thereof. A protection structure is disposed between the die and the pattern units for preventing the die from damage during a separation of the die from the semiconductor wafer.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
Because some of the pattern units 114, such as PCM patterns, are necessary during the fabrication process of the dies, some methodologies have been developed for preventing damage caused by those pattern units during a die separation process. For example, one conventional methodology is to make the pattern units 113 as slotted structures for reducing the metal density alone the scribe band. Another conventional methodology is to designate the corners of a die as exclusion zones, in which no part of an integrated circuitry shall be constructed. Thus, although chipping or cracking may occur at the corners of a die, the integrated circuitry constructed thereon remains unaffected.
Having recognized the necessity of deploying pattern units in the scribe bands of a semiconductor wafer, the present invention discloses a semiconductor wafer with a protection structure that prevents a damage from occurring during a die separation process. The protection structure is disposed between a die and its adjacent pattern units in a scribe band. When a saw blade moves through the scribe band, the protection structure helps to distribute the stress away from the die, thereby preventing an advance of damage into the die.
One or more pattern units 214 are disposed between two neighboring dies in the scribe band 202 or 204. The pattern units may be PCM patterns that are used for monitoring the fabrication process of the integrated circuitry in the dies 201, 203, 205 and 207. In this embodiment, the pattern units are no more than about 50×70 um in size. A protection structure 206, 208, 210 or 212 is disposed between the boundary line of the die 201, 203, 205 or 207 and the pattern units 214. The protection structures 206, 208, 210 and 212 are of a linear shape, such as a continuous or discrete line. The protection structure 206 or 210 is disposed adjacent to the pattern units 214 on an opposite side with respect to the protection structure 208 or 212, respectively. During a die separation process, the pairs of protection structures 206/208 or 210/212 help to confine stress applied from a saw blade to scribe band 202 or 204 therebetween. This prevents an advance of crack, caused by the die separation process, into the die.
For each row or column of pattern units 214, the protection structures at the opposite sides are placed evenly apart from a center line of the scribe band 202 or 204 with a minimum distance allowed by a predetermined design rule. The opposite protection structures are arranged in substantially parallel. These protection structures 206, 208201 and 212 may be made of metal or metal alloys in one or more layers. The possible candidates for the metal or metal alloys include, but not limited to, W, Al, AlCu, Cu, Ti, TiSi2, Co, CoSi2, Ni, NiSi, TiN, TiW, or TaN.
The protection structure 302 includes more than one metal line for preventing an advance of crack into the die 306 during a process of separating the die 306 from a semiconductor wafer. The metal lines may be continuous or discrete. The number of the metal lines may vary. For example, while the protection structure 302 in
The protection structure 402 includes at least two metal lines connected with one another by at least one bridge unit 404. The protection structure 402 may be placed at both sides of the pattern units 406. The protection structure 402 helps to prevent an advance of crack into a die 408 during a process of separating the die 408 from the semiconductor wafer.
As such, the present invention provides the advantages of easy construction, and low fabrication costs. The protection structures can be selectively constructed as discrete lines, continuous lines and, thereby providing various effects of stress distribution during a die separation process. Thus, the proposed semiconductor wafer with the protection structure can effectively prevent damage to the dies, during a die separation process.
The above illustration provides many different embodiments or embodiments for implementing different features of the invention. Specific embodiments of components and processes are described to help clarify the invention. These are, of course, merely embodiments and are not intended to limit the invention from that described in the claims.
Although the invention is illustrated and described herein as embodied in one or more specific examples, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention, as set forth in the following claims.