Patent Application
20150129284
Various embodiments are generally directed to an electrical device configured with a printed circuit substrate that can have at least one internal lead having a continuously curvilinear boundary.
Advancing technology has heightened industry demand for decreased form factor devices capable of ever-faster data transfer rates, increased data storage capacity, and more robust data access reliability. Such demand can be accommodated by increasing the number of internal leads on a predetermined area of a printed circuit board (PCB) or printed circuit cable (PCC). However, reduction in the space between internal leads can pose a risk of solder bridging and electrical shorts after electrical connections are established on the PCB or PCC. Hence, industry has continued to strive for increased numbers of internal leads on a PCB or PCB without heightened risk of electrical shorts.
Accordingly, a printed circuit substrate may be configured with at least one internal lead that has a continuously curvilinear boundary. The continuously curvilinear boundary can allow the internal lead to be positioned a closer distance from an adjacent internal lead on the printed circuit substrate than a linear, rectangular, or partially curvilinear electrical lead without increasing the chance of solder bridging and electrical shorts forming. The ability to tune the continuously curvilinear boundary can allow for an isolation channel to have a uniform width throughout the longitudinal axis of the internal lead that reduces the possibility that an electrical connection will be formed between adjacent leads.
The construction of additional internal leads can allow for the reduction in size of other electronic components attached to a PCC and/or a PCB that can be used with any electrical device, such as a hard disk drive, hybrid drive, and solid-state drive. While shaped internal leads can be employed in an unlimited number and variety of electrical devices,
Each HGA 112 can comprise a head-stack assembly 114 (“actuator”) that has a flexible suspension 116, which in turn is supported by a rigid actuator arm 118. The actuator 114 may pivot about a cartridge bearing assembly 120 through application of current to a voice coil motor (VCM) 122 to cause the transducers (numerically denoted at 124) to align with tracks (not shown) defined on the media surfaces to store data thereto or retrieve data therefrom. The data storage device 100 can also comprise a printed circuit substrate 126, such as a printed circuit board (PCB), that is connected to the transducers 124 via a printed circuit cable (PCC) 128 to facilitate the operation of the data storage device 100.
The printed circuit board 130 is not limited to a particular configuration, function, or number of electrical leads. For example, the printed circuit board 130 an employ numerous individual chips with independent functions, individual chips with multiple functions, or a single package having multiple functions either alone or in combination with one another. The increasing number of constituent board components and functions has emphasized the number of leads 140 present and available for electrical connection.
However, a reduction in lead 140 size or proximity to one another can increase the risk of inadvertent electrical connections between adjacent leads 140, such as solder bridge 142 shown between vertically offset leads. In other words, constructing the printed circuit board 130 with laterally aligned leads having a separation pitch 144 between bonding pads can inefficiently utilize space, but reducing the separation pitch either by offsetting the leads, as shown by the left two leads 140, or positioning the leads closer together can produce unwanted solder bridging 142 that interconnects two or more leads 140. It is noted that the linear sidewalls of the leads can contribute to solder bridging conditions 142 as the distance between leads 140 is minimized.
With these issues in mind, a printed circuit board may employ shaped internal leads that allow increased number of leads to be incorporated onto the board without raising the risk of inadvertent solder bridging 142 during formation of electrical connections with the respective leads 140.
While not required or limiting, the bonding areas 152, 154, and 156 each have a common width 162, as measured orthogonal to the Y and longitudinal 164 axes of the lead 150. The common width 162 can be tuned to be greater than the lead channel width 166 and to provide greater surface area for the respective bonding areas 152, 154, and 156. The ability to tune the bonding area width 162 can extend to tuning the bonding areas 152, 154, and 156 to have different surface areas, as shown by the second bonding area 154 having a greater surface area than the first 152 and third 156 bonding areas, which have the same surface area.
Tuning of the internal lead 150 is not limited to the bonding areas 152, 154, and 156 as the lead channels 160 and wire 168 can be tuned for length, along the longitudinal axis 164, and width 166 and 170, respectively, to provide characteristics that optimize lead 150 operation. For instance, the lead channel width 166 can be tuned to be larger than the wire width 170, but smaller than the bonding area width 162 to allow for increased surface area for solder interconnection. Various embodiments may further tune the internal lead 150 to provide a linear boundary 172 that connects the continuously curvilinear sidewalls 168 that define the lateral extent of each bonding area 152, 154, and 156. Such linear boundary 172 may allow an increased number of electrical leads 150 or components to be positioned on a printed circuit substrate, such as PCB or PCC.
While the first 152 and third 156 bonding areas have a smaller surface area than the second bonding area 154, various embodiments can tune the size, position, and presence of an electrical connection 178 for each bonding area of each internal lead to interconnect to any number of external electrical components.
Despite the reduced width of the lead channels 190 compared to the bonding areas 188, the curvilinear boundary 192 can be tuned, as shown, to produce an isolation channel 198 between each lead pair. It is contemplated that the isolation channels 198 can be similar or dissimilar shapes and sizes within the array 180 due to the tuned configuration of the bonding areas 188 and boundaries 192 of the respective leads 182, 184, and 186. In yet, various embodiments configure each isolation channel 198 of the array 180 with electrically insulating material, such a printed circuit substrate material, and a uniform separation distance 200 between each lead pair.
Such a uniform separation distance 200 can be measured along the X axis, perpendicular to the longitudinal axis 196 of each lead, and angled with respect to the longitudinal axis 196, as displayed. The uniform sized space between leads provided by the isolation channels 198 can allow the leads 182, 184, and 186 to be positioned in the vertically offset zig-zag pattern shown in
The example internal lead array 210, displayed as a top view block representation in
The ability to configure at least one internal leads with more or less bonding areas than other internal leads of an array allows for the array 210 to be customized to diverse varieties of electrical connections with optimized usage of printed circuit substrate space and risk of inadvertent solder bridging conditions. The ability to provide increased numbers of bonding areas 216 and 220 allows the array 210 to more efficiently and accurately form electrical connections than if multiple electrical connections were formed on a single bonding area.
The position and configuration of the respective internal leads 244 and bonding areas 246 can be tuned to facilitate efficient pathways for the electric wires 252 to the respective components 248 and 250 with minimal or no wire overlap, which can corresponds with inadvertent electrical shorts as well as increased manufacturing time and complexity. It can be appreciated that while a number of bonding areas 246 are available, electrical connections 242 may be made to less than all the areas 246 for an unlimited number of reasons, such as inductance of the internal lead 244, size of the electrical connection 242, and position of bonding areas 246 on a printed circuit substrate.
Next, step 266 populates the printed circuit substrate with at least one electrical component, such as a processor. Some embodiments populate the electrical component in a different assembly to which the printed circuit substrate connects, such as a printed circuit cable connecting to a printed circuit board comprising the populated electrical component. Regardless of the number, size, and position of the electrical component populated in step 266, step 268 subsequently places at least one solder ball onto one or more bonding areas of at least one internal lead to prepare the bonding area and internal lead for a bonded electrical connection. The term solder ball is not limiting as a piece of partially or completely solid solder of any size and shape can be placed directly in contact with or be aligned above various bonding areas of assorted internal leads to satisfy step 268.
While step 268 can organize a plurality of solder balls in a grid array that places the solder in contact with respective bonding areas simultaneously, the grid array is not required as solder balls can be placed individually in various embodiments, such as by a pick-and-place machine. The placement of solder onto at least one bonding area in step 268 can trigger step 270 to next interconnect the bonding area with predetermined regions of the printed circuit substrate via electrical wires. It should be noted that the electrical wires of step 270 are not limited to pre-formed wires as solder traces may be constructed to function as electrical wires within the bounds of the present disclosure.
The electrical wires constructed and placed in step 270 can then be secured to the respective bonding areas and internal leads in step 272 with the reflowing of the solder into electrical connections between at least one internal lead and a trace gimbal assembly (TGA), such as a TGA tail of a flexure of an actuating assembly like actuator 114 of
The hardened electrically conductive connections can facilitate complete operation of the printed circuit substrate and enable step 274 to assemble the printed circuit assembly into a computing device, such as a rotating data storage device. Through the various steps of routine 260, the size, shape, and electrical connections of various internal leads can be tuned to optimize space and operation on the printed circuit substrate. However, routine 260 is not limited to the steps shown in
The ability to tune an internal lead of a printed circuit substrate for shape allows any number of bonding areas to be formed with predetermined widths, surface areas, and curvilinear boundaries to optimize the formation of electrical connections to one or more of the bonding pads. Tuning the continuously curvilinear boundary of more than one internal lead further allows for the vertically offset position of a pair of internal leads and the establishment of an isolation channel having a uniform separation distance. Such isolation channel can increase the density of internal leads on the printed circuit substrate without increasing the risk of solder bridging conditions that arise from solder flowing into contact with adjacent internal leads. It is to be understood that even though numerous characteristics and configurations of various embodiments have been set forth in the foregoing description, together with details of the structure and function of various embodiments, this detailed description is illustrative only, and changes may be made in detail, especially in matters of structure and arrangements of parts within the principles of the present disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. For example, the particular elements may vary depending on the particular application without departing from the spirit and scope of the present disclosure.
