Patent Application
20130037855
This invention relates to an infrared sensor, and more particularly, to a Si—Ge laminated thin film suitable for a bolometer material to be used for a bolometer type infrared sensor.
All substances emit infrared radiation resulting from the temperatures of the substances. A device which senses the infrared radiation and thereby detects the temperature of an object of observation is generally referred to as “infrared sensor”. Such infrared sensors are arrayed at a microlevel to be used in an infrared imaging technology. By using the infrared imaging technology, the temperature of the object of the observation may be visualized, and thus, video images may be taken out even in a dark field such as one during the night. Therefore, the infrared imaging technology has become a technology essential to a security camera, a surveillance camera, or the like. Further, in recent years, the infrared imaging technology has attracted attention also from the viewpoint of its application for distinguishing a person who has a fever caused by influenza or the like.
Infrared radiation is a generic name for electromagnetic waves in a region of wavelengths longer than visible radiation, and wavelength ranges used by an infrared sensor are roughly broken into near-infrared radiation (up to about 3 μm), mid-infrared radiation (about 3 to 8 μm), and far-infrared radiation (about 8 to 14 μm).
In particular, far-infrared radiation is important for an infrared sensor for observing a human life environment because far-infrared radiation is less absorbed by the atmosphere, a human body temperature emits far-infrared radiation in the vicinity of 10 μm at body temperature, and the like.
As a material for an infrared sensor, a quantum infrared sensor having a sensor material of HgDdTe has been widely used. However, when such a quantum infrared sensor is used, the temperature of the device is required to be lowered at least to liquid nitrogen temperature (77 K), and thus, a cooling system for cooling the device is required, which limits downsizing of the device.
Therefore, in recent years, an uncooled infrared sensor which does not need to cool the device to a low temperature is widespread. As the uncooled infrared sensor, a bolometer the principle of which is to detect change in electrical resistance that accompanies change in temperature of the device is widely used. In particular, a material obtained by forming a thin film of vanadium oxide (hereinafter, abbreviated as VOX), amorphous Si, or the like is commercialized and widely available.
Indices of performance of a bolometer include some parameters. Among such parameters, in particular, the electrical resistance change factor per degree of temperature change (value obtained by dividing resistance change per temperature change by the resistance value) referred to as Temperature Coefficient of Resistance (TCR) and resistivity are important parameters. Specifically, a material having a TCR the absolute value of which is large and having a low resistivity is demanded. As a material to be used in a bolometer, a material which exhibits semiconductive properties is suitable, and the TCR thereof is a negative value.
As VOX used in an uncooled bolometer at present, VOX having a TCR which exceeds about −4%/K at room temperature is reported (see, for example, Japanese Unexamined Patent Application Publication (JP-A) No. 2000-143243 (corresponding to U.S. Pat. No. 6,489,613) (hereinafter, referred to as “Patent Document 1”)). With regard to a mass produced product level, VOX having a TCR of −1.5%/K is used. However, there are various crystal phases in VOX, each of which exhibits its own particular properties. Under present circumstances, when infrared sensor devices using VOX are arrayed, it cannot be said that unevenness in performance is not necessarily sufficiently small even among arrays within one wafer, because, for example, it is difficult to cause the mixture ratio of the various crystal phases to be constant.
Further, when a film of VOX is formed, it is necessary to introduce not an ordinary silicon process but a dedicated process. Therefore, there is a limitation that the production line itself is required to be dedicated to VOx. Further, adverse effects on wiring and the like due to the necessity of causing the annealing temperature to be 400° C. or higher and the like are also feared.
Further, during the 1990s, there was developed in which a bolometer a device material thereof was amorphous Si that could be totally manufactured in a silicon process. The manufacturing process of amorphous Si may be simplified, and thus, amorphous Si is advantageous from the viewpoint of costs. However, there is a problem that the resistivity is incomparably higher.
Against this backdrop, a bolometer in which a device material thereof is polycrystalline silicon-germanium (hereinafter, referred to as p-SiGe) has been also developed and commercialized (see, for example, Japanese Unexamined Patent Application Publication (JP-A) No. Hei 11-40824 (corresponding to U.S. Pat. No. 6,194,722) (hereinafter, referred to as “Patent Document 2”)). However, VOX and amorphous Si are mainstream in the present market for uncooled bolometers, and p-SiGe is not widely available as yet. p-SiGe has a problem that, although its TCR is large, its resistivity is high. Further, a small difference in composition ratio between Si and Ge affects the unevenness in performance, and thus, it is necessary to strictly control the composition in vapor-phase growth by CVD. Further, it is necessary to raise the annealing temperature to about 650° C., and thus, there is also a demerit that other portions forming the device are liable to be adversely affected.
Further, it is also a problem that crystal distortion of p-SiGe is large, and thus, the thin film itself is liable to be deformed by annealing after the film is formed. Therefore, a method of alleviating distortion due to the crystal structure when p-SiGe is used has been searched for (see, for example, Japanese Unexamined Patent Application Publication (JP-A) No. 2007-165927 (corresponding to U.S. Pat. No. 7,075,081) (hereinafter, referred to as “Patent Document 3”)). However, under present circumstances, there is no perfect solution thereto.
Further, an idea is provided with regard to a thermal sensor using a superlattice structure in which Si and Ge are laminated (see, for example, Japanese Unexamined Patent Application Publication (JP-A) No. 2008-70353 (corresponding to U.S. Pat. No. 7,442,599) (hereinafter, referred to as “Patent Document 4”)). In Patent Document 4, with regard to a Si layer and a Ge layer, each of the film thicknesses is defined to be in a range of 2 to 50 nm and the number of units of the Si—Ge layer to be repeatedly formed is defined to be in a range of 10 to 100. However, in Patent Document 4, there is no definite reference to the crystal states of Si and Ge in the layered structure.
As described above, p-SiGe has the following problems.
With regard to p-SiGe, when the TCR is increased, the resistivity becomes higher, and when the resistivity is decreased, the TCR becomes smaller, and thus, it is difficult to set optimum conditions with regard to the composition ratio and the annealing conditions.
The crystal structure of p-SiGe is liable to be distorted, and thus, is liable to be deformed due to internal stress caused by annealing treatment after the device is formed or the like. In particular, it is necessary to raise the annealing temperature to about 1,000° C., and thus, wiring and the like which form the device are adversely affected.
In order to form a film of p-SiGe, it is necessary to use CVD, but the equipment is expensive, which leads to increase in the manufacturing cost. It is also possible to carry out sputtering or the like in forming a film of p-SiGe, but there are problems including difficulty in strictly controlling the composition.
In p-SiGe, the crystal structure of Si and the crystal structure of Ge are the same and a complete solid solution is formed, and thus, it is difficult to control the composition to be uniform within a large diameter wafer.
Other prior art documents related to this invention is further known.
For example, Japanese Unexamined Patent Application Publication (JP-A) No. 2003-282977 (hereinafter, referred to as “Patent Document 5”) discloses a manufacturing method in which a Si—Ge laminated film is formed by sputtering.
Patent Document 5 only discloses an ordinary technology of manufacturing a SeGe laminated film by sputtering.
Further, Japanese Unexamined Patent Application Publication (JP-A) No. Hei 03-284882 (hereinafter, referred to as “Patent Document 6”) discloses a superlattice structure in which an a-Si layer and a polycrystalline germanium layer are alternately laminated. In Patent Document 6, a-Si and a-Ge are alternately laminated. The solid phase growth temperature of a-Si is 500° C. while the solid phase growth temperature of a-Ge is 300° C. After a-Si and a-Ge are laminated, by carrying out thermal annealing treatment at a relatively low temperature (300 to 400° C.), only a-Ge undergoes solid phase growth to form the polycrystalline germanium layer. In this way, the a-Si layer and the polycrystalline germanium layer are alternately laminated. Patent Document 6 also discloses that, after the lamination is formed, a vacuum chamber is filled with a nitrogen (N2) atmosphere, the temperature in the chamber is held at 300° C., and annealing is carried out for five hours.
Patent Document 6 discloses prior art of a laminated film (superlattice) of an ordinary semiconductor amorphous Si/crystallized Ge, and also refers to treatment such as annealing. However, Patent Document 6 does not refer to a specific size of the Ge crystal structure.
It is an object of this invention to provide a Si—Ge material, which can be made at a lower cost with higher reliability that in a conventional case and has a large TCR and a low resistance value, by carrying out annealing treatment at a relatively low temperature to a Si—Ge laminated film formed using sputtering which may be controlled at a relatively low cost.
According to this invention, there is provided a Si—Ge laminated thin film, including at least one Si layer and at least one Ge layer, which are alternately laminated on a substrate, in which: the at least one Si layer and the at least one Ge layer each have a thickness in a range of 5 to 500 nm; the at least one Si layer is amorphous and only the at least one Ge layer is crystallized; and an average crystallite size of Ge in the at least one Ge layer is 20 nm or less.
According to this invention, the average crystallite size of Ge in the Ge layer is 20 nm or less, and thus, a large TCR is maintained, and still, the electrical resistance may be lowered.
Structures and manufacturing methods of an infrared sensor material according to exemplary embodiments of this invention are described in detail in the following. However, the structures and configuration exemplified in the exemplary embodiments of this invention are only examples for causing the effects thereof to manifest themselves and the structures and the configurations are not limited to those which are described before or in the following.
As a method of manufacturing a thin film, sputtering, CVD, a sol-gel method, or the like may be used. In particular, sputtering has a merit that the interface between Si and Ge is clear, and thus, diffusion of atoms at the interface due to annealing treatment is less liable to occur. Therefore, sputtering is most preferred as the method of forming the film according to exemplary embodiments of this invention. With regard to sputtering, there is no specific limitation, but, in order that a reaction such as oxidation or nitriding may be less liable to occur in sputtering, it is desired that the vacuum before the film is formed be reduced to at least 10−3 Torr or lower, more preferably 10−6 Torr or lower.
It is preferred that a Si layer has electrical conductivity to some extent, and thus, it is preferred to use a target having B or the like doped therein. However, if B or the like is doped too much, the electrical resistance may be lowered too much, and thus, the TCR may be reduced. Therefore, it is desired to use a Si target having a resistivity in a range of 10−3 to 102 Ω·cm by controlling the amount of the doped B or the like. However, in sputtering, the amount of B vapor-deposited on a substrate is not necessarily in proportion to the amount of the doped B, and thus, it is not necessary to strictly determine the doped amount.
In a Si—Ge thin film, electrical conduction in a Ge layer is dominant, and thus, it is necessary that the resistivity of the Ge layer be sufficiently lower compared with that of the Si layer. Therefore, a target having As, Sb, or the like doped therein may be used. However, a sufficiently low resistivity may be obtained by microcrystallizing Ge itself and the electrical conduction may be affected when the doped element is precipitated, and thus, it is desired that a Ge target with no element doped therein be used. However, it is not necessary to strictly determine whether there is a doped element or not and the resistivity of the target. Further, the temperature of the substrate when the film is formed is not specifically limited, either, but it is desired that the stage of the sputtering be carried out at room temperature in order to prevent crystallization.
Note that, the temperature of the substrate may be set at 200 to 550° C. when the Si layer and the Ge layer are laminated. In this case, crystallization may be carried out at the stage of the film formation, and thus, the annealing process may be eliminated.
As illustrated in
The thicknesses of the Si layer 31 and the Ge layer 22 are not specifically limited, but it is preferred that both of the thicknesses be in a range of about 5 to 500 nm. However, when, for example, the Si layer 31 is thin, there is a possibility that a pinhole is formed therein or that leakage current flows due to tunneling currents. Further, when the Ge layer 22 is thin, there is a possibility that sufficient electrical conduction cannot be obtained, but, when the film thickness is too large, there is a possibility that crystallization of the Ge layer 22 breaks the Si layer 31. Therefore, the film thicknesses are preferably in a range of 10 to 250 nm, and more preferably, in a range of 25 to 125 nm.
It is desired that the Si layer 31 have an amorphous structure. However, if, when the film is formed, a part thereof is crystallized, it is not necessarily required that the Si layer 31 be in a fully amorphous state. Note that, the amorphous structure in the Si—Ge laminated film in the exemplary embodiments of this invention means that the crystallinity of Si in the Si layer is at least less than 10%.
It is desired that the Ge layer 22 be microcrystallized. Even when the Ge layer 22 is not microcrystallized when the film is formed, it is desired that, by annealing treatment thereafter, at least 70% or more of the structure be microcrystallized. Further, it is desired that the average crystallite size of Ge be in a range of 5 to 50 nm, and more preferably, it is desired that the average crystallite size of Ge be 20 nm or less. The average crystallite size which is presented here is calculated using Scherrer's equation from the half-width of a peak observed in an X-ray diffraction spectrum, and is a value derived from the results in examples described below. However, the crystallite size may also be estimated using an electron microscope such as a transmission electron microscope (TEM) or a scanning electron microscope (SEM).
In this case, the reason that the average crystallite size of Ge is set to 20 nm or less is as follows. If the crystallite size of Ge exceeds 20 nm, the electrical resistance may be lowered, but the TCR is also reduced. On the other hand, if the crystallite size of Ge is 20 nm or less, the electrical resistance is lowered, and still, the reduction in TCR is small (the TCR is maintained). Requirements which are desired for an infrared material are that the TCR thereof is large and the electrical resistance thereof is low. With regard to an ordinary material (structure), by lowering the electrical resistance, the TCR is reduced (trade-off relation). An ordinary Si—Ge laminated film has a similar tendency. Therefore, in the exemplary embodiments of this invention, the average crystallite size of Ge is set to 20 nm or less, and thus, an effect of lowering the electrical resistance while maintaining a large TCR may be obtained.
As illustrated in
The number of the laminated Si layers and the number of the laminated Ge layers are not required to be specifically limited, but at least one Si layer and at least one Ge layer are laminated. Specifically, it is desired that the number of the laminated Si layers and the number of the laminated Ge layers are each in a range of 2 to 20, more preferably 3 to 10. These ranges of the numeric values are not to be strictly determined, but are set taking into consideration that, when 10 or more layers are laminated, the Si layers become electrical barriers, and thus, layers which are nearer to the substrate are less liable to contribute to the electrical characteristics such as the TCR and the resistivity.
As illustrated in
It is desired that the annealing treatment of the Si—Ge thin film be carried out at 600° C. or lower. More preferably, it is desired that the annealing treatment be carried out at 550° C. or lower, and it is essential that at least Ge forming the Ge layer 22 may be microcrystallized. Further, the lower limit of the annealing temperature is not limited, but it is thought that a temperature which is 300° C. or higher is necessary, and thus, it is appropriate to carry out the annealing at a temperature in a range of 300 to 550° C. The annealing temperature presented here is lower as compared with the annealing temperature specified in Patent Document 3 above (600 to 700° C.), which indicates that members such as microwiring are less damaged.
The atmosphere of the annealing treatment is not specifically limited, but, in order to reduce the effect of oxidation, nitriding, or the like of Si and Ge, it is desired that the atmosphere be replaced by an inert gas such as Ar. Further, when, by taking out the thin film after being formed to the atmosphere, the activated surface of the thin film is exposed to an environment under the effect of oxidation, nitriding, or the like, it is desired that the annealing treatment be carried out in a reducing atmosphere. Further, pressure applied when the annealing is carried out is not specifically determined, but, in order to prevent an atmospheric gas from entering into the thin film, it is desired that the annealing be carried out not under excessive pressure but under normal atmospheric pressure or under a reduced pressure.
The Si—Ge laminated thin film is used as a thermal resistance sensing portion of an infrared sensor having an appropriate structure, that is, as an infrared sensor material. The infrared sensor may be a single device type, or may be in the form of a two-dimensionally arranged array such as the form used in an image sensor. Further, the infrared sensor may also have a structure in which the sensor material is arranged on a curved surface or on a polyhedron.
The manufacturing process of the infrared sensor using the Si—Ge laminated thin film differs from a method of manufacturing a conventional infrared sensor only in the conditions of the film formation, and a conventional method may be used in other steps. Therefore, the manufacturing process may be easily applied to a microstructure such as a two-dimensional infrared image sensor using an infrared sensor.
In the following, the Si—Ge laminated thin film according to this invention is specifically described by showing examples of this invention.
SiO2 substrate 1 (hereinafter, referred to as quartz substrate 1) was put into an RF magnetron sputtering system (hereinafter, abbreviated as sputtering system), and the vacuum inside the system was set to 10−3 Torr or lower. As illustrated in
A sample formed similarly to the case of Example 1 was put into a tubular electric furnace. After evacuation to 10−3 Torr or lower, the temperature was raised to 500° C. while causing an Ar gas to flow at 500 cm3/min, and the state was held for two hours. After that, cooling was carried out while causing an Ar gas to flow. After the temperature was lowered to 100° C. or lower, the sample was taken out. The sample of Example 2 is illustrated on the right side of
The temperature of a sample formed similarly to the case of Example 1 was raised to 700° C. under conditions which were the same as those of Example 2, and the state was held for two hours. After that, cooling was carried out while causing an Ar gas to flow. After the temperature was lowered to 100° C. or lower, the sample was taken out. Electrodes were formed on the sample surface 10 similarly to the case of Example 1 (
The quartz substrate 1 was put into a sputtering system, and the vacuum inside the system was set to 10−3 Torr or lower. Using as the standard the sputtering rate determined by the preliminary experiment, a Ge layer was laminated by 1 μm to form a Ge single layer film. The sample was taken out of the sputtering system. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
A sample formed similarly to the case of Comparative Example 1 was put into a tubular electric furnace, and a sample which was annealed at 500° C. similarly to the case of Example 2 was formed. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
A sample formed similarly to the case of Comparative Example 1 was put into a tubular electric furnace, and a sample which was annealed at 700° C. similarly to the case of Example 3 was formed. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
The quartz substrate 1 was put into a sputtering system, and the vacuum inside the system was set to 10−3 Torr or lower. Using as the standard the sputtering rate determined by the preliminary experiment, a Si layer was laminated by 1 μm to form a Si single layer film. The sample was taken out of the sputtering system. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
A sample formed similarly to the case of Example 4 was put into a tubular electric furnace, and a sample which was annealed at 500° C. similarly to the case of Example 2 was formed. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
A sample formed similarly to the case of Example 4 was put into a tubular electric furnace, and a sample which was annealed at 700° C. similarly to the case of Example 3 was formed. Electrodes were formed on the sample surface 10 similarly to the case of Example 1.
The quartz substrate 1 was put into a sputtering system, and the vacuum inside the system was set to 10−3 Torr or lower. Using as the standard the sputtering rate determined by the preliminary experiment, a film of SiGe was formed by simultaneously sputtering Si and Ge so that the ratio there between was 7:3. The sample was taken out of the sputtering system and was put into a tubular electric furnace. After evacuation to 10−3 Torr or lower, the temperature was raised to 650° C. while causing an Ar gas to flow at 500 cm3/min, and the state was held for two hours. After that, cooling was carried out with Ar gas caused to flow. After the temperature was lowered to 100° C. or lower, the sample was taken out. A polycrystalline SiGe film (p-SiGe film) 42 manufactured in this way is illustrated on the right side of
As a matter of fact, as shown in a table of
It is found that, in this way, the structure obtained in Example 2 is the structure presented in this invention (on the right side of
As described above, by using the structure and the method according to this invention, an infrared sensor material optimum for an infrared sensor may be obtained.
Next, effects of the examples of this invention are described.
According to the examples of this invention, the Si layer and the Ge layer are alternately laminated, and thus, a uniform film may be formed even on a wafer having a large diameter. Further, by carrying out annealing treatment at a low temperature of 500° C. or lower, the Ge layer may be microcrystallized on a priority basis, and the resistivity may be lowered without reducing the TCR. Therefore, it is not necessary to extremely raise the process temperature, and other portions forming the device are less affected. Further, distortion caused by alternate dissolving of Si and Ge is suppressed, and thus, a thin film in which the extent of inside distortion is small and which is less liable to deform due to heat or the like may be formed, and the design accuracy of the infrared sensor device may be improved.
While the invention has been particularly shown and described with reference to the exemplary embodiments (and examples), the invention is not limited to these embodiments. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the sprit and scope of the present invention as defined by the claims.
This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2010-101692, filed on Apr. 27, 2010, the disclosure of which is incorporated herein in its entirety by reference.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-101692 | Apr 2010 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2011/058374 | 3/25/2011 | WO | 00 | 10/24/2012 |
