Small Form Factor PCBA Process Carrier

Abstract

A process carrier is capable of supporting printed circuit boards during manufacturing and testing. The process carrier includes a base plate, a first top plate and a second top plate. The base plate has an upper surface including a recessed area sized to receive a panelized group of printed circuit board substrates and a lower surface. The first top plate is coupleable to the upper surface of the base plate during a first manufacturing process. The first top plate includes a plurality of connected rails configured to secure the panelized group of printed circuit board substrates. The second top plate is coupleable to the upper surface of the base plate during a second manufacturing process. The second top plate is configured to cover the panelized group of printed circuit board substrates.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top perspective view of a base plate of a process carrier for supporting printed circuit board substrates for the manufacture of printed circuit board assemblies under one embodiment.

FIG. 2 is a plan view of an upper surface of the base plate illustrated in FIG. 1.

FIG. 3 is a top perspective view of the base plate of FIG. 1 supporting a panelized group of printed circuit board substrates.

FIG. 4 is a top plan view of FIG. 3.

FIG. 5 is a top perspective view of a first top plate of a process carrier under one embodiment.

FIG. 6 is a top perspective view of the first top plate of FIG. 5 mounted to the base plate of FIGS. 1-4.

FIG. 7 is a top plan view of FIG. 6 including surface mount devices (SMDs) coupled to each of the panelized group of printed circuit board substrates.

FIG. 8 is a top perspective view of the base plate of FIGS. 1-4 including the panelized group of printed circuit board substrates after the first top plate is removed.

FIG. 9 is a bottom perspective view of a second top plate of a process carrier under one embodiment.

FIG. 10 is a top perspective view of the second top plate of FIG. 9 mounted to the base plate of FIGS. 1-4.

FIG. 11 is a top plan view of FIG. 10.

FIG. 12 is a bottom plan view illustrating the bottom surface of the base plate illustrated in FIGS. 10 and 11.

Claims

1. A base plate for a process carrier that supports printed circuit boards during manufacture and testing, the base plate comprising: a lower surface;an upper surface having a recessed area sized to receive a panelized group of printed circuit board substrates;a plurality of perforations extending between the upper surface and the lower surface of the base plate; anda plurality of test openings extending between the upper surface and the lower surface of the base plate.

2. The base plate of claim 1, wherein the recessed area has a depth substantially equal to a thickness of the panelized group of printed circuit board substrates such that an upper surface of the panelized group of printed circuit board substrates is substantially planar with a non-recessed area of the upper surface of the base plate when the panelized group of printed circuit board substrates are received in the recessed area.

3. The base plate of claim 1, wherein the plurality of perforations are located in the recessed area of the upper surface and located in a non-recessed area of the upper surface.

4. The base plate of claim 1, wherein the test openings are located in the recessed area of the upper surface.

5. The base plate of claim 1, wherein the plurality of test openings are shaped to match a shape of each test pad included in each PCBA.

6. The base plate of claim 1, wherein each of the plurality of perforations are of similar size and geometric shape.

7. A process carrier capable of supporting printed circuit boards during manufacturing and testing, the process carrier comprising: a base plate having an upper surface including a recessed area sized to receive a panelized group of printed circuit board substrates and a lower surface;a first top plate coupleable to the upper surface of the base plate during a first manufacturing process, the first top plate including a plurality of connected rails configured to secure the panelized group of printed circuit board substrates; anda second top plate coupleable to the upper surface of the base plate during a second manufacturing process, the second top plate configured to cover the panelized group of printed circuit board substrates.

8. The process carrier of claim 7, wherein the recessed area has a depth substantially equal to a thickness of the panelized group of printed circuit board substrates such that an upper surface of the panelized group of printed circuit board substrates is substantially planar with a non-recessed area of the upper surface of the base plate when the panelized group of printed circuit board substrates are received in the recessed area.

9. The process carrier of claim 7, further comprising a plurality of uniformly dispersed perforations extending between the upper surface and the lower surface of the base plate.

10. The process carrier of claim 7, further comprising a plurality of test point openings extending between the upper surface and the lower surface of the base plate.

11. The process carrier of claim 7, wherein the plurality of rails of the first top plate extend along and secure peripheral edges of each of the panelized group of printed circuit board substrates.

12. The process carrier of claim 7, wherein the plurality of connected rails include a lower surface, the lower surface having a plurality of notches formed thereon to promote air flow between the first top plate and the panelized group of printed circuit board substrates.

13. The process carrier of claim 7, wherein the first top plate includes a plurality of screw openings formed between an upper surface of the rails and the lower surface of the rails and at corners thereof for receiving fasteners to secure the first top plate to the base plate.

14. The process carrier of claim 7, wherein the second top plate comprises a continuous upper surface for covering the panelized group of printed circuit board substrates.

15. The process carrier of claim 14, wherein the second top plate comprises a plurality of cavities formed on a lower surface of the second top plate, wherein each cavity is configured to cover each of the panelized group of printed circuit board substrates located in the recessed area of the upper surface of the base plate.

16. The process carrier of claim 15, wherein the second top plate includes a plurality of screw openings formed between the upper surface and the lower surface of the second top plate and at corners thereof for receiving fasteners to secure the second top plate to the base plate.

17. A method of manufacturing printed circuit board assemblies, the method comprising: providing a base plate including a recessed area sized to receive a panelized group of printed circuit board substrates;placing the panelized group of printed circuit board substrates in the recessed area of the base plate;performing a first manufacturing step with a first top plate secured to the base plate, the first top plate having a plurality of rails that secure peripheral edges of each of the panelized group of printed circuit board substrates;removing the first top plate; andperforming a second manufacturing step with a second top plate secured to the base plate.

18. The method of claim 17, wherein performing the first manufacturing step with the first top plate secured to the base plate comprises placing surface mount devices on each of the panelized group of printed circuit board substrates.

19. The method of claim 18, wherein performing the first manufacturing step with the first top plate secured to the base plate further comprises bonding the surface mount devices to each of the panelized group of printed circuit board substrates by conducting an infrared reflow process.

20. The method of claim 17, wherein performing the second manufacturing step with the second top plate secured to the base plate comprises testing each of the panelized group of printed circuit board substrates by accessing test pads on each printed circuit board substrate through test point openings formed in the recessed area of the base plate.