Claims
- 1. A manufacturing method of a solid state imaging device including a substrate of one conductivity type, a layer of an opposite conductivity type on said substrate, a well region of one conductivity type formed in said layer of an opposite conductivity type and a plurality of unit pixels, each thereof including, in said well region, a photodetection diode and an insulated gate field effect transistor placed adjacent to said photodetection diode for optical signal detection, comprising the steps of:forming a gate insulating film above said well region and forming an insulating film made of a same material as that for said gate insulating film in an element isolation region for isolating adjacent unit pixels from each other; patterning a conductive film to form a gate electrode on said gate insulating film and to form an element isolation electrode on said insulating film of said element isolation region; and introducing impurities of an opposite conductivity type by using said gate electrode and said element isolation electrode as masks to form source and drain regions and to isolate devices.
- 2. The manufacturing method of a solid state imaging device according to claim 1, further comprising a step of forming a carrier pocket near and along said source region in said well region below said gate electrode to store optically generated charges generated in said photodetection diode.
- 3. The manufacturing method of a solid state imaging device according to claim 2, wherein said gate electrode has a ring shape, said source region is formed in said well region inside said gate electrode, said drain region is formed in said well region outside said gate electrode, and said carrier pocket is formed near said source region in said well region below said gate electrode to surround said source region.
- 4. The manufacturing method of a solid state imaging device according to claim 1, further comprising a step of forming a diffusion separation region of one conductivity type in said element isolation region to reach said substrate, before said step of forming said gate insulating film and said insulating film made of said same material as that for said gate insulating film in said element isolation region for isolating said adjacent unit pixels from each other.
- 5. The manufacturing method of a solid state imaging device according to claim 1, wherein a material for said conductive film is polysilicon.
- 6. The manufacturing method of a solid state imaging device according to claim 1, wherein said solid state imaging device consists of a plurality of unit pixels arrayed in row and column directions, and said element isolation region is formed only between said columns or between said rows.
- 7. A solid state imaging device manufactured by said method specified in claim 1.
- 8. A solid state imaging apparatus comprising a solid state imaging device specified in claim 7.
Priority Claims (2)
Number |
Date |
Country |
Kind |
11-351987 |
Dec 1999 |
JP |
|
2000-237513 |
Aug 2000 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a division of U.S. Ser. No. 09/722,041, filed Nov. 27, 2000 which issued as U.S. Pat. No. 6,545,331 on Apr. 8, 2003 and claims, under 35 USC 119, priority of Japanese Application No. 11-351987 filed Dec. 10, 1999 and Japanese Application 2000-237513 filed Aug. 4, 2000.
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