This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2018-130453, filed Jul. 10, 2018, the entire contents of which are incorporated herein by reference.
Embodiments described herein relate generally to a storage device.
Some storage devices use a variable resistance layer. Such storage devices desirably operate stably.
In general, according to one embodiment, a storage device comprises a first conductive layer including a first element, a second conductive layer including a second element; and a first intermediate layer between the first conductive layer and the second conductive layer in a first direction. The first intermediate layer includes a first compound region and a second compound region between the first compound region and the second conductive layer in the first direction. The second compound region comprises an oxide of the second element. The first compound region includes a first partial region and a second partial region adjacent to the first partial region in a second direction intersecting the first direction. The second compound region includes a third partial region and a fourth partial region adjacent to the third partial region in the second direction. An electrical resistance between the first conductive layer and the second conductive layer is higher in a first state of the first intermediate layer than an electrical resistance between the first conductive layer and the second conductive layer in a second state of the first intermediate layer. The first and second states of the first intermediate layer caused by application of opposite polarity potentials across the first intermediate layer. In the first state, a concentration of the first element in the first partial region is higher than a concentration of the first element in the second partial region. Additionally, the thickness, in the first direction, of the third partial region in the first state is greater than the thickness, in the first direction, of the fourth partial region in the first state.
Example embodiments of the present disclosure will now be described with reference to the drawings.
The drawings are schematic or conceptual; thus, the relationship between the thickness and the width of a component or element, the size ratio between components or elements, etc. are not necessarily to scale. The same component(s) or element(s) may be depicted in different sizes or ratios in different drawings.
In the drawings and in the following description, the same reference numerals are used for the same or similar components or elements, and a duplicate description thereof will sometimes be omitted.
These figures illustrate different states of the storage device.
As shown in
The storage device 110 of this example also includes a controller 70 which is electrically connected to the first conductive layer 21 and the second conductive layer 22. The controller 70 is, for example, electrically connected to the first conductive layer 21 by interconnects 70a. The controller 70 is, for example, electrically connected to the second conductive layer 22 by interconnects 70b. A switching device, for example, may be provided in the interconnects. The controller 70A is configured to apply a voltage between the first conductive layer 21 and the second conductive layer 22.
The first conductive layer 21 contains a first element 21A. The first element 21A comprises, for example, at least one element selected from the group consisting of copper (Cu) and silver (Ag). The first element 21A may further comprise a plurality of different of elements. The following description illustrates a particular example where the first element 21A is copper (Cu).
The second conductive layer 22 contains a second element 22A. The second element 22A comprises, for example, at least one element selected from the group consisting of tungsten (W), molybdenum (Mo), aluminum (Al), nickel (Ni), tantalum (Ta) and chromium (Cr). The second element 22A may comprise a plurality of different of elements. The following description illustrates a particular example where the second element 22A is tungsten (W).
The direction from the second conductive layer 22 toward the first conductive layer 21 is parallel to a first direction. The first direction is herein referred to also as a Z-axis direction. A direction perpendicular to the Z-axis direction is referred to as an X-axis direction. A direction perpendicular to both the Z-axis direction and the X-axis direction is referred to as a Y-axis direction.
The first intermediate layer 41 is provided between the first conductive layer 21 and the second conductive layer 22. The first intermediate layer 41 includes a first compound region 31 and a second compound region 32. The second compound region 32 is provided between the first compound region 31 and the second conductive layer 22. The second compound region 32 contains an oxide of the second element 22A. When the second element 22A comprises tungsten (W), the second compound region 32 contains WOx (an oxide of tungsten).
The first intermediate layer 41 can be in either a first state ST1 (see
The second state ST2 may be caused, for example, by making the electric potential of the second conductive layer 22 lower than the electric potential of the first conductive layer 21. The first state ST1 may be caused, for example, by making the electric potential of the second conductive layer 22 higher than the electric potential of the first conductive layer 21.
As shown in
The concentration of the first element 21A in the first partial region pr1 is higher than the concentration of the first element 21A in the second partial region pr2. For example, in first state ST1, a high-concentration region 31F containing the first element 21A at a high concentration is produced in the first compound region 31. The concentration of the first element 21A in the high-concentration region 31F is higher than the concentration of the first element 21A in the other region of the first compound region 31. Thus, the high-concentration region 31F is a local high-concentration region. The high-concentration region 31F is, for example, a filament.
The high-concentration region 31F is formed in the second state ST2 (see
As shown in
In
As shown in
The feature that the thickness t3 is larger than the thickness t4 produces the following: the resistance in the first state ST1 can be made higher as compared to the case where the thicknesses t3 and t4 are the same; the on/off ratio can be increased; a difference between the high-resistance state and the low-resistance state can be maintained stably; and good retention characteristics can be obtained. It therefore becomes possible to provide a storage device which can operate more stably.
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For example, as shown in
As shown in
For example, in the first state ST1, the first compound region 31 includes a first-layer region 31s and a second-layer region 31t, as shown in
The first compound region 31 also includes the first-layer region 31s and the second-layer region 31t when in the second state ST2, as shown in
In this embodiment, the first compound region 31 contains, for example, Zx1Ca1−x1MnO3 (0<x1<1). Here, “Z” represents, for example, at least one element selected from the group consisting of the elements represented by the atomic symbols Pr, La, Gd, Ce, Pm, Sm, Eu, Td, Dy, Ho, Er, Yb, and Lu. Also, “Ca” represent the element calcium, “Mn” represents the element manganese, and “O” represents the element oxygen. In some examples, “Z” may more particularly represent at least one element selected from the group consisting of the elements Pr, La and Gd. In one particular example, the first compound region 31 contains Prx1Ca1−x1MnO3 (0<x1<1).
As shown in
As shown in
Specific characteristics of a storage device 110 will now be described.
As shown in
The transition from the high-resistance state to the low-resistance state at the voltage Va1 may be considered to correspond to the high-concentration region 31F reaching the second conductive layer 22. The rapid drop of the electric current Ia at the voltage Va2 may be considered to correspond to the high-concentration region 31F leaving (disconnecting from) the second conductive layer 22. The behavior upon the transition from the negative voltage Va2 to the negative voltage Va3 may be considered to correspond to the increase in the thickness t3 of the third partial region pr3.
The controller 70 makes the electric potential of the first conductive layer 21 lower than the electric potential of the second conductive layer 22 to form the first state ST1. The controller 70 makes the electric potential of the first conductive layer 21 higher than the electric potential of the second conductive layer 22 to form the second state ST2.
As shown in
The first intermediate region 35 is provided between the first conductive layer 21 and the first compound region 31. The first intermediate region 35 contains at least one compound selected from the group consisting of titanium-tungsten (TiW), tantalum (Ta), silicon dioxide (SiO2), aluminum oxide (AlOx), tantalum oxide (TaOx) and silicon nitride (SiN). The provision of the first intermediate region 35 can prevent the first element 21A from entering the first compound region 31 excessively from the first conductive layer 21. This enables more stable operation of the device.
In one example, the thickness of the first intermediate region 35 in the first direction (Z-axis direction) is not more than the thickness of the first compound region 31 in the first direction. If the thickness of the first intermediate region 35 is excessively large, it is difficult for the first element 21A to migrate from the first conductive layer 21 into the first compound region 31, resulting in a too high operating voltage, for example. The thickness of the first intermediate region 35 in the first direction (Z-axis direction) is preferably not less than 0.25 nm. If the thickness of the first intermediate region 35 is less than 0.25 nm, it is difficult to prevent the first element 21A from entering the first compound region 31 excessively.
As shown in
A plurality of first conductive layers 21 are provided in this example. The first conductive layers 21 are arranged next to each other in the third direction. A plurality of second conductive layers 22 are provided in this example. The second conductive layers 22 are arranged next to each other in the second direction. A first intermediate layer 41 is provided between each of the first conductive layers 21 and each of the second conductive layers 22.
As shown in
A plurality of first interconnects 51 are provided in this example. The first interconnects 51 are arranged next to each other in the third direction. A plurality of second interconnects 52 are provided in this example. The second interconnects 52 are arranged next to each other in the second direction. Each laminate SBL is provided between one of the first interconnects 51 and one of the second interconnects 52.
In one embodiment, the first interconnects 51 may be first conductive layers 21. The second interconnects 52 may be second conductive layers 22.
A plurality of first intermediate layers 41 are provided in the storage devices 210 and 211. Each of the first intermediate layers 41 functions as a memory cell.
The illustration of at least part of an insulating portion is omitted from
As shown in
A second conductive layer 22 extends in the third direction (Y-axis direction in this example). A first intermediate layer 41 is provided between one of the first conductive layers 21 and the second conductive layer 22. For example, the first intermediate layer 41 is provided between each of the first conductive layers 21 and the second conductive layer 22.
For example, the first intermediate layer 41 includes a portion that overlaps one of the first conductive layers 21 in the first direction (Z-axis direction), and a portion that overlaps another one of the first conductive layers 21 in the first direction. Further, the first intermediate layer 41 includes a portion that overlaps, in the first direction, an area located between the one of the first conductive layers 21 and the another one of the first conductive layers 21. An insulating portion can be provided between the each of the first conductive layers 21 and its adjacent the first conductive layers 21. For example, the first intermediate layer 41 overlaps the insulating portion in the first direction.
As depicted, the second conductive layer 22 and the first intermediate layer 41 constitutes a columnar member. The columnar member extends in the Y-axis direction. A plurality of such columnar members are arranged in the X-axis direction.
As shown in
The second intermediate layer 42 is provided between one of the third conductive layers 23 and the fourth conductive layer 24. For example, the second intermediate layer 42 is provided between each of the third conductive layers 23 and the fourth conductive layer 24.
The third conductive layers 23 extend in the second direction (e.g. the X-axis direction). The third conductive layers 23 are disposed spaced from each other in the third direction (e.g. the Y-axis direction). The fourth conductive layer 24 extends in the third direction (e.g. the Y-axis direction).
In this example, the direction from one of the first conductive layers 21 toward one of the third conductive layers 23 is parallel to the Z-axis direction. For example, the third conductive layers 23 are disposed spaced from the first conductive layers 21 in the Z-axis direction.
Apart of the second conductive layer 22 is provided between one of the third conductive layers 23 and one of the first conductive layers 21. A part of the fourth conductive layer 24 is provided between the part of the second conductive layer 22 and the one of the third conductive layers 23.
For example, the fourth conductive layer 24 and the second intermediate layer 42 constitutes a columnar member. The columnar member extends in the Y-axis direction. A plurality of such columnar members are arranged in the X-axis direction. The columnar member consisting of the fourth conductive layer 24 and the second intermediate layer 42 may be integrated with the columnar member consisting of the second conductive layer 22 and the first intermediate layer 41. An insulating portion 201 may be provided between the second conductive layer 22 and the fourth conductive layer 24.
A substrate 10 is provided in this example. A silicon oxide film 11 is provided on the substrate 10. An interlayer insulating film 12 and a conductive film 13 are provided on the silicon oxide film 11. One-side ends of the second conductive layer 22 and the fourth conductive layer 24 are electrically connected to the conductive film 13, while the other ends of the second conductive layer 22 and the fourth conductive layer 24 are electrically connected to one of a plurality of bit lines 62 via a connecting portion 62c. Each of the first conductive layers 21 and each of the third conductive layers 23 are electrically connected to one of a plurality of word lines 69 via a connecting portion 69c. For example, the bit lines 62 and the word lines 69 are electrically connected to the controller 70.
The construction (and material) of the first conductive layer 21, the construction (and material) of the second conductive layer 22 and the construction (and material) of the first intermediate layer 41 can be applied to the third conductive layer 23, the fourth conductive layer 24 and the second intermediate layer 42, respectively. The second intermediate layer 42 between one of the third conductive layers 23 and one of the fourth conductive layers 24 functions as one of memory cells.
These figures illustrate two states of the second intermediate layer 42 (corresponding to one of memory cells).
The controller 70 is electrically connected to the third conductive layer 23 by interconnects 70c or the like. The controller 70 is electrically connected to the fourth conductive layer 24 by interconnects 70d or the like.
As shown in
As shown in
In the third state ST3, the fourth compound region 34 includes a ninth partial region pr9 and a tenth partial region pr10. The direction from the ninth partial region pr9 toward the seventh partial region pr7 is parallel to a first direction (Z-axis direction). The direction from the tenth partial region pr10 toward the eighth partial region pr8 is parallel to the first direction (Z-axis direction).
In
The fourth compound region 34 includes the ninth partial region pr9 and the tenth partial region pr10 also in the fourth state ST4 shown in
As shown in
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As shown in
The second intermediate layer 42 also may include the first intermediate region 35 (see
This embodiment makes it possible to provide a storage device which can operate stably.
The phrase “electrically connected” as used herein includes a state in which one or more conductors in which electric current flows are physically in contact with each other, and also a state in which electric current flows between the electrically connected conductors via inclusion of some other conductor (s) interposed therebetween.
The terms “perpendicular” and “parallel” used herein should not be bound to their strictest geometrical sense, and should be construed to mean “substantially perpendicular” and “substantially parallel”, allowing for variation due to manufacturing process, measurement errors, and the like.
Embodiments of the present disclosure have been described with reference to specific examples; however, it is understood that the present disclosure is not limited to the specific examples. For example, specific constructions of various components or elements of a storage device, such as a conductive layer, an intermediate layer, a compound region, interconnects, a circuit portion, etc., will be encompassed by the scope of the present disclosure as long as those of ordinary skill in the art, through appropriate selection within the scope of known technology, can make and use the present disclosure in the same manner and can produce the same effects.
Those combinations of two or more of the components or elements, as described above with reference to the specific examples, which are technically feasible should also be considered encompassed within the scope of the present disclosure.
Storage devices which can be made by one skilled in the art through common design changes in any one of the above-described storage devices according to the embodiments of the present disclosure, should also be considered encompassed by the scope of the present disclosure as long as such storage devices still incorporate the technical concepts of the present disclosure.
It is understood that those of ordinary skill in the art would make various changes and modifications in implementing the embodiments of the present disclosure; however, such changes and modifications are to be considered within the scope of the present disclosure.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
---|---|---|---|
2018-130453 | Jul 2018 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
8913418 | Wang | Dec 2014 | B2 |
9246085 | Wang | Jan 2016 | B1 |
20130344649 | Gallo | Dec 2013 | A1 |
20140001429 | He et al. | Jan 2014 | A1 |
20140185358 | Jo | Jul 2014 | A1 |
20150102279 | Fujii | Apr 2015 | A1 |
20170141303 | Chen | May 2017 | A1 |
Number | Date | Country |
---|---|---|
2011054766 | Mar 2011 | JP |
2013058792 | Mar 2013 | JP |
Number | Date | Country | |
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20200020854 A1 | Jan 2020 | US |