Claims
- 1. A partially fabricated semiconductor device, comprising:
- a semiconductor layer having an outer surface;
- a gate body separated from said outer surface of said semiconductor layer by a gate insulator;
- the gate body having an inner surface proximate to the semiconductor layer and an opposite outer surface;
- a conductive source region formed in the outer surface of the semiconductor layer and spaced apart from the gate body;
- a conductive drain region formed in the outer surface of the semiconductor layer and spaced apart from the gate body opposite the conductive source region to define a channel region in the semiconductor layer disposed inwardly of the gate insulator;
- a source side insulator body formed adjacent the gate body proximate to the conductive source region;
- a drain side insulator body formed adjacent the gate body proximate to the conductive drain region;
- thermally alterable contaminants from prior fabrication steps which have been present during processing at temperatures which would cause alteration of said contaminants and which are substantially unaltered so that said contaminants remain inert to cobalt and cobalt silicide disposed on said outer surface of said semiconductor layer;
- a nickel silicide layer interfused to the outer surface of the gate body, said unaltered contaminants and to the outer surface of the semiconductor layer proximate to the conductive source and drain regions; and
- the nickel silicide layer having a sheet resistance of less than 20 ohms per square.
- 2. The semiconductor device of claim 1, further comprising the gate body having a linewidth of less than 0.5 .mu.m.
- 3. The semiconductor device of claim 1, wherein the gate body comprises polysilicon.
- 4. A partially fabricated semiconductor device, comprising:
- semiconductor layer having an outer surface;
- a gate body separated from an outer surface of said semiconductor layer by a gate insulator;
- the gate body having an inner surface proximate to the semiconductor layer and an opposite outer surface;
- a conductive source region formed in the outer surface of the semiconductor layer and spaced apart from the gate body;
- a conductive drain region formed in the outer surface of the semiconductor layer and spaced apart from the gate body opposite the conductive source region to define a channel region in the semiconductor layer disposed inwardly of the gate insulator;
- a source side insulator body formed adjacent the gate body proximate to the conductive source region;
- a drain side insulator body formed adjacent the gate body proximate to the conductive drain region;
- thermally alterable contaminants from prior fabrication steps which have been present during processing at temperatures which would cause alteration of said contaminants and which are substantially unaltered so that said contaminants remain inert to cobalt and cobalt silicide disposed on said outer surface of said semiconductor layer;
- a cobalt silicide layer interfused to the outer surface of the gate body, said unaltered contaminants and to the outer surface of the semiconductor layer proximate to the conductive source and drain regions; and
- the cobalt silicide layer having a sheet resistance of less than 20 ohms per square.
- 5. The semiconductor device of claim 4, further comprising the gate body having a linewidth of less than 0.5 .mu.m.
- 6. The semiconductor device of claim 4, wherein the gate body comprises polysilicon.
- 7. A semiconductor device, comprising:
- a semiconductor layer having an outer surface;
- a gate body separated from said outer surface of said semiconductor layer by a gate insulator;
- the gate body having an inner surface proximate to the semiconductor layer and an opposite outer surface;
- thermally alterable contaminants from prior fabrication steps which have been present during processing at temperatures which would cause alteration of said contaminants and which are substantially unaltered so that said contaminants remain inert to cobalt and cobalt silicide disposed on said outer surface of said semiconductor layer;
- a conductive source region disposed in the outer surface of the semiconductor layer and spaced apart from the gate body;
- a conductive drain region formed in the outer surface of the semiconductor layer and spaced apart from the gate body opposite the conductive source region to define a channel region in the semiconductor layer disposed inwardly of the gate insulator;
- a source side insulator body formed adjacent the gate body proximate to the conductive source region;
- a drain side insulator body formed adjacent the gate body proximate to the conductive drain region;
- unaltered contaminants resulting from fabrication of each of the above-mentioned elements which are inert to one of nickel and nickel silicide or cobalt and cobalt silicide disposed on said outer surface of said semiconductor layer; and
- a layer of said one of a nickel silicide or cobalt silicide interfused to the outer surface of the gate body and to the outer surface of the semiconductor layer proximate to the conductive source and drain regions.
- 8. The semiconductor device of claim 7, further comprising the gate having a linewidth of less than 0.5 .mu.m.
- 9. The semiconductor device of claim 7, wherein the gate body comprises polysilicon.
- 10. The semiconductor device of claim 7, wherein said one of cobalt silicide or nickel silicide layer has a sheet resistance of less than 20 ohms per square.
- 11. The semiconductor device of claim 8, wherein said one of cobalt silicide or nickel silicide layer has a sheet resistance of less than 20 ohms per square.
- 12. The semiconductor device of claim 9, wherein said one of cobalt silicide or nickel silicide layer has a sheet resistance of less than 20 ohms per square.
- 13. A semiconductor device fabricated by a method of fabricating a transistor in a surface of a semiconductor layer, comprising the steps of:
- forming a gate body separated from an outer surface of the semiconductor layer by a gate insulator, the gate body having an inner surface proximate to the semiconductor layer and an opposite outer surface;
- depositing an insulator layer over the semiconductor layer and the gate body;
- anisotropically etching the insulator layer to form side walls on said gate body and causing a residual layer of contaminants to form on the outer surface of the semiconductor layer and on the outer surface of the gate body;
- non-thermally depositing a protective layer outwardly of the residual layer of contaminants;
- implanting a dopant into the semiconductor layer proximate to the side walls;
- then thermally treating the semiconductor layer to activate the dopant;
- then removing the protective layer;
- depositing a metal layer outwardly of the semiconductor layer and the gate body; and
- forming a silicide layer by interacting the metal layer with the outer surface of the semiconductor layer and with the outer surface of the gate body.
- 14. The device of claim 13, wherein said gate body is a polysilicon body, wherein the polysilicon body has a linewidth of less than 0.5 .mu.m.
- 15. The device of claim 13, wherein said gate body is a polysilicon body, wherein the polysilicon body has a linewidth of less than 0.4 .mu.m.
Parent Case Info
This application is a continuation of 08/957,808 filing date Oct. 24, 1997 now U. S. Pat. No. 6,037,254.
US Referenced Citations (3)
Non-Patent Literature Citations (1)
Entry |
Sze, Semiconductor Devices , p. 377, 1985. |
Continuations (1)
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Number |
Date |
Country |
Parent |
957808 |
Oct 1997 |
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