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The present invention relates generally to sensors and more particularly to digital temperature sensors with correction techniques.
High accuracy temperature measurements are required in a wide variety of applications such as medical, automotive and control. It is desirable that these digital temperature sensors (DTS) have low manufacturing costs. Standard CMOS processes are a very good option with regard to cost but do not have high-performance bipolar transistors which may be required for some functions. Therefore, substrate PNP (SPNP) transistors are used instead. However, these transistors are not usually well modeled, often leading to first-order approximations. Production calibration may be a solution to overcome some of these problems. However, the extremely high cost of having an absolute temperature reference (e.g. oil-bath) in high-volume production testing makes it not feasible. Thus, there is a need for a more accurate DTS system and method.
The invention is illustrated in the figures of the accompanying drawings, which are meant to be exemplary and not limiting, and in which like references are intended to refer to like or corresponding parts.
a shows a ΔVBE generation diagram with a sequential scheme.
b shows a ΔVBE generation diagram with a differential scheme.
A system and method are provided for a digital temperature sensor (DTS) with piece-wise gain and offset correction in the digital domain. In order to describe the benefits and features of the design of the DTS, it is instructive to divide the issues of measuring temperature into three different sub-issues, namely an analog temperature sensor based on generation of a proportional to temperature voltage (ΔVBE), the reference voltage, and the analog to digital (A-to-D) converter. Each block has its own error sources which are addressed independently.
An accurate voltage proportional to temperature can be generated by applying two collector currents sequentially with the use of one SPNP, or simultaneously if one uses plurality of SPNPs.
where N is the ratio between IC2/IC1, k is Boltzmann's constant (1.38·10−23 JK−1), q is the electron charge (1.602·10−19 C), T is the absolute temperature. Assuming N=4, ΔVBE@25 C=35.65 mV and it varies with a sensitivity of ΔVBE/T=119.56 μV/K.
Equation 1 can be extended to include all the relevant non-idealities as illustrated in equation 2 below.
where:
The series resistance is provided by equation 3 below:
All the previous non-idealities (1-5) may cause non-linearities in the ΔVBE generation, therefore it is beneficial to reduce the unwanted effects in equation 2 where possible in order to obtain a ΔVBE as similar as possible to the ideal (term 2 in equation 2).
1) Non-Ideality Factor (nf)
Its effect can be assumed to be negligible.
A stable current-ratio (N) can be obtained by a ratio of MOS devices.
Therefore, the mismatch between these devices substantially determines this error term.
The absolute value of the current unit and the ratio for current sources 100 and 110 of
Voltage drop across series resistance (RS) may increase temperature errors. Several techniques can be applied to cancel this error out.
The main error sources in a reference voltage affecting the accuracy of a DTS include:
The Initial Accuracy can provide an offset error at the output of a DTS. This error can be taken into account and minimized when calibrating the reference voltage absolute value.
The TC can be the main contributor to temperature error in a DTS. For example, for a reference TC of 100 ppm/° C., assuming the input voltage is 35.646 mV at +25° C. and 47.6 mV at +125° C. (this provides a sensitivity of 119.56 μV/K), the reference voltage may shift by 1% in the whole temperature range. The output voltage at +125° C. may be 47.6 mV+476.02 μV, yielding an error in the temperature reading of 3.98° C. Thus, the minimum reference TC for a particular configuration can be obtained as a function of the temperature error budget allowed in the application. It may be beneficial to use a state-of-art voltage reference to obtain high-accuracy in a DTS.
Voltage Noise at the output of the reference voltage, 406 of
The ADC 410 converts the analog input signal from the analog temperature sensor 400 to a digital signal representing the temperature 425. The transfer function of an ideal A-to-D converter is shown in equation 5.
where b is the ADC number of bits, and Offset and Gain are two digital calibration words accommodating the A-to-D errors.
Some requirements for the ADC to be used in a DTS include: resolution, accuracy (or errors), and bandwidth. In one embodiment of the present invention, the resolution of the ADC 410 may be sufficient to make converter quantization errors negligible. ADC 410 errors (offset, gain drift and non-linearities) can contribute to reduce the overall DTS accuracy. Therefore, it is beneficial to reduce these converter errors. In an embodiment of the present invention, a bandwidth below tens of Hertz can suffice. Thus, the design offers flexibility such that many types of converters could meet these requirements.
In light of the requirements discussed above, an embodiment of the present invention can include Sigma-Delta (ΣΔ) A-to-D converters 410. In another embodiment, Successive-Approximation (SAR) A-to-D converters are suitable architectures for high performance temperature measurements. Both achieve high-linearity and high-accuracy. Because bandwidth is not a primary constraint, in an embodiment of this invention, a high-resolution ΣΔ A-to-D converter with low offset and gain drift can be used.
By applying a gain and an offset in the digital domain 440 to the digital signal representing the temperature 425, comprising raw digital data, the signal 425 can be brought closer to the desired output, as illustrated in
In one embodiment, the piece-wise linearization can be implemented by comparing the output code of the digital filter 420 against a multiplicity of threshold digital values in the comparator 430. For example, to yield 3 different temperature regions, 2 thresholds may be used. Once the active region is determined, the best gain/offset pair can be selected to minimize the error. The embodiment of the high accuracy temperature sensor architecture of
In another embodiment, hysteresis may be added to prevent repeatedly coming in and out of 2 gain/offset pairs when the temperature is at a threshold. The threshold comparison can be based on two 16-bit digital comparators 430. For example, the first comparator may compare if the raw data 425 is <=the threshold and the second comparator may compare if the raw data 425 is >the threshold. The output of these comparators 430 enables/disables the different gains/offsets. These values can be stored in poly-fuses, ROM, EEPROM, or any other digital storage device. It is understood that the procedure and description above is simply exemplary and that one skilled in the art would be able to vary values and ranges based on the concepts presented above.
In principle, it is beneficial if sensor response is linear with temperature, however, as previously explained, there are several factors which may cause the temperature sensor output to vary from a linear response. These factors can include:
Sensor gain and offset
Transistor non-ideality factor nf
Current ratio mismatch error
Current gain error
Transistor series resistance
Voltage reference errors
ADC errors
Careful design of all the blocks in
Those skilled in the art will readily understand that the concepts described above can be applied with different devices and configurations. Although the present invention has been described with reference to particular examples and embodiments, it is understood that the present invention is not limited to those examples and embodiments. The present invention as claimed, therefore, includes variations from the specific examples and embodiments described herein, as will be apparent to one of skill in the art. Accordingly, it is intended that the invention be limited only in terms of the appended claims.