Motorola 88200 Cache/Memory Management Unit User's Manual, Second Edition, Rev. 1, copyrighted 1988, pp.: front cover, 3-14, 4-3, 5-4 to 5-10, 5-36 to 5-62, 6-9. |
Tanenbaum, Andrew S., "Operating Systems: Design and Implementation," 1987, Prentice-Hall International, Inc., p. 57. |
Keith Diefendorff, "The 88110: A Superscalar Microprocessor with Graphics Support", (slides and transcript of speech presented at Microprocessor Forum on Nov. 6, 1991). |
Keith Diefendorff, "The 88110: A Superscalar Microprocessor with Graphics Support", (preliminary slides provided Sep. 1991 for presentation at Microprocessor Forum on Nov. 6, 1991). |
Keith Diefendorff and Michael Allen, "Organization of the Motorola 88110: A Superscalar RISC Microprocessor", Proceedings of Intl. Processing Society of Japan, Nov. 1991, pp. 77-87. |
Keith Diefendorff and Michael Allen, "The Motorola 88110 Superscalar RISC Microprocessor", sent to publisher for publication in 1992 COMPCON Proceedings, to be published Feb. 24, 1992. |
Keith Diefendorff and Michael Allen, "The Motorola 88110 Superscalar RISC Microprocessor", preliminary slides for presentation at COMPCON to be held on Feb. 24, 1992. |
Keith Diefendorff and Michael Allen, "Organization of the Motorola 88110 Superscalar RISC Microprocessor", IEEE Micro, submitted to IEEE on Dec. 13, 1991 (not published yet). |
Keith Diefendorff and Michael Allen, "Organization of the Motorola 88110 Superscalar RISC Microprocessor", IEEE Micro, submitted to IEEE on Jan. 21, 1992 in revised form (not published yet). |
Cezzar, Ruknet, "The Design of a Processor Architecture Capable of Forward and Reverse Execution," IEEE Proceedings of Southeastcon '91, pp. 885-890, vol. 2, Apr. 7-10, 1991. |
Intel, "iAPX 86/88, 186/188 User's Manual, Hardware Reference," pp. 1-5: to 1-7, 1-15 to 1-16, 1-26, 1-39, 1-49, 1985. |