1. Field of the Invention
The invention is concerned with a layer sequence of a semiconductor component, a passive semiconductor component and a method for manufacture.
2. Description of the Related Art
The invention is concerned with a thermistor as a semiconductor component, for example, in bolometers. Polysilicon layers are conventionally employed as thermistors. Therein the temperature sensitivity of the resistance, the so-called TCR-value, can be adjusted over a range by doping of the polysilicon.
From U.S. Pat. No. 5,260,225 a process is known for producing an integrated, infrared sensitive bolometer employing doped polysilicon with a TCR-value of between 1-2%/° C. The doping material is selected from arsenic, phosphorous and boron. The IR sensitive polysilicon layer is provided on a thermally insulated silicon oxide layer, which serves to inhibit temperature transmission to the substrate.
Likewise, a device useful as a bolometer array is known from EP 0 354 369, which is coupled to an integrated circuit with a boron doped amorphous SiH resistor.
From U.S. Pat. No. 5,440,174 the use of WSiN-layers as resistors and diffusion barriers in integrated circuits is known. By adjusting the nitrogen content of these layers it is possible to adjust both the resistance value as well as the diffusion inhibiting effect with regard to oxygen in a targeted manner.
Likewise the use of WSiN-layers in MESFETs are know from Tabatabaie, K (1995); IEEE Transactions on Electron Devices, Vol. 42, No. 7, pp. 1205. The preferred use of these layers is likewise concerned with the diffusion inhibiting effect in combination with tempering processing during the production of GaAs-components.
No publications have until now disclosed in WSiN-layers the thermal characteristics depending upon the chemical composition of the layers, and in particular, with regard to the relationship between the TCR-value and nitrogen content.
The invention is concerned with the task of providing a layer sequence or structure and a therewith associated passive semiconductor component with high TCR and low 1/f-noise, which can be produced in integrated semiconductor construction techniques.
The invention with regard to the layer sequence is set forth in the characterizing portion of Patent claim 1, with regard to the passive semiconductor component is set forth in the characteristics of claims 4 and 5, and with regard to the process for manufacture is set forth in the characteristic portion of Patent claim 13. The remaining claims concern advantageous embodiments and further developments of the invention.
The invention concerns a layer sequence of a thin layer resistor with high temperature coefficient on a substrate. It is comprised of first passivating layer, a WSiN-layer responsible for the temperature dependent electrical resistance, and a first metalizing layer.
Preferably, between the first passivating layer and the WSiN-layer, there is an intermediate layer for thermal insulation. The intermediate sequence layer is comprised of a polymide or BCB-layer (benzocyclobutene), which may be separately etched on substrates or bonding layers.
As the WSiN-layer material, in connection with the present invention, a substantially amorphous material is described, which in its chemical composition has a variable elemental content WXSiYNZ with x, y as main components and with incorporation of a small proportion of z. With this WSIN a material, which has until now not been used for this purpose, is employed, which exhibits a remarkably low 1/f-noise also at higher TCRs, for example greater than 1%/° C. Besides this, the WSiN exhibits an absorption in the infrared radiation range, whereby a preferred use is in bolometers. Besides this, this material can be removed or etched from almost all substrate materials by a low temperature process.
The passive semiconductor component, structured in a layer sequence, is comprised of a WSiN-residual layer which is employed as the thermistor of the inventive layer sequence. Between the electrical connections there is an opening for passage-through of the electromagnetic radiation to the thermal sensitive WSiN-Rest layer.
Below this opening there is also to be provided a second, radiation transmissive, passivating layer.
For thermal insulation, an intermediate layer sequence is preferably provided between the substrate and WSiN-layer, which prevents a conductance of heat into the substrate. This intermediate layer sequence for thermal insulation is only provided locally in the area of the radiation effect. The substrate itself can be comprised of a material with low thermal conductivity, for example, glass. In the employment of silicon, preferably insulation layers of greater thickness are employed and the silicon is separated or spaced apart below the thermistor.
For an application in the infrared range, the second passivating layer is correspondingly adapted for transmissivity for this type of electromagnetic radiation.
Besides the employment of intermediate layer sequences as insulation layers, thermal insulation is preferably achieved in the area of the opening for the passage-through of irradiation in the manner that the substrate, from the bottom side to the first passivating layer, is electrochemically etched or removed.
A thermal decoupling of the substrate occurs either by etching the carrier material or by use of a layer with low thermal conductivity.
The process for producing a passive semiconductor component is comprised in a sequence of process steps:
A particular advantage of the WSIN materials, which were previously not employed for these purposes, results from the characteristic, that even at higher TCRs, for example greater than 1%/° C., they have an extraordinarily low 1/f-noise.
A further advantage with this type of WSiN thermal resistor results from the ability to chemically deposit on almost all substrate materials. Thereby this material makes possible a simple and economical production of this type of construction component.
In the following the invention will be described in greater detail on the basis of preferred embodiments with reference to schematic representations in the figures. There is shown:
a-h method of manufacture of a thermistor with a free standing layer in the radiation area,
a-d method of manufacturing a thermistor with a BCB-layer as insulation layer,
a-e method of manufacturing a thermistor with a polyimide mesastructure as insulation layer.
In one illustrative embodiment according to the
On a silicon substrate 1 approximately 400 μm thick, an approximately 2 μm thick oxide layer is deposited as first passivating layer 2, preferably via a CVD-process (Chemical Vapor Deposition). Upon this first passivating layer 2 a WSiN-layer 3 is deposited using the PVD-method (Physical Vapor Deposition) under defined addition of nitrogen gas during the deposition process. Depending upon the nitrogen content in the process gas the TCR-value and the mechanical layer characteristics can be intentionally influenced over a broad range. Using the same PVD-method a WTi/Al-layer as first metal layer 4 (
In a further process the first metal layer 4 is structured into a first connection metallization, in that with a first mask 5 the areas not to be etched are covered, and by means of a wet chemical process the first metal layer 4 is eroded with the exception of the remaining residual as first connection metallization 4′ (
The WSiN-layer 3 exposed to the surface following the etching process is then, in the area between the first connection metallization 4′, covered by a further second mask 6. The WSiN is removed in the surrounding areas by RIE (Reactive Ion Etching). The WSiN-layer remaining under the mask 5 and 6 defines the active zone of the thermistor (
A further oxide layer as second passivating layer 7 is deposited with an approximate thickness of 400 nm. In the areas of the first connection metallization 4′ openings for electrical connections are structured at the ends of the WSiN-residual layer 3′ (
Metal contacts 8 of WTi/Au are introduced in these openings. The part of the second passivating layer 7 positioned between the metal contacts is so designed, that this represents an opening transmissive for electromagnetic radiation. In certain cases the passivating layer is thinned in the radiated area (
In further course of the process, for thermal decoupling, the substrate 1 is removed from the substrate bottom side up to the bottom side of the first passivating layer 2 in the area between the connection metallization 4′. For this the upper side is covered over with a third mask 9 (
With a fourth mask 10, of which the thickness is approximately 15 to 20 μm, the substrate back side is covered and in the areas of the active thermistor layer on the front side is opened for an etching process. Due to the relatively thick substrate 1 a high rate etching process is used for removing the substrate with the exception of the substrate residue 1′ (
Alternatively, between the WSiN-residue layer 3′ and the first connection metallization 4′, an intermediate layer sequence 13, 14 or as the case may be 15 is etched and so structured that this provides thermal insulation to the substrate 1 (
In the case of the method represented in
In the case of the method shown in
Number | Date | Country | Kind |
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199 61 180 | Dec 1999 | DE | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCTDE00/04320 | 12/5/2000 | WO | 00 | 6/18/2002 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO0145151 | 6/21/2001 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
4760369 | Tiku | Jul 1988 | A |
5635893 | Spraggins et al. | Jun 1997 | A |
5640013 | Ishikawa et al. | Jun 1997 | A |
6013935 | Shie | Jan 2000 | A |
6191420 | Souma | Feb 2001 | B1 |
6329655 | Jack et al. | Dec 2001 | B1 |
6329696 | Tanaka | Dec 2001 | B1 |
20020132491 | Lang | Sep 2002 | A1 |
Number | Date | Country |
---|---|---|
0 354 369 | Feb 1990 | EP |
0 848 427 | Jun 1998 | EP |
63-261703 | Oct 1988 | JP |
11273907 | Oct 1999 | JP |
Number | Date | Country | |
---|---|---|---|
20020192853 A1 | Dec 2002 | US |