Patent Application
20100296210
The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.
In the past, the semiconductor industry utilized various methods and structures to form transient suppression devices (TSD). These transient suppression devices typically were utilized to protect electronic equipment from transient electrical disturbances such as an electrostatic discharge (ESD) or electromagnetically coupled interference. The transient electrical disturbances generally occurred at the terminals of electronic devices such as at the input and output terminals. The transient electrical disturbances could damage the electronics of the devices therefore the transient suppression devices were attached to the terminals of the electronic device to minimize damage. The transient suppression devices typically were zener diodes or a transistor coupled in a diode configuration. The transient suppressor devices typically had a high impedance which resulted in a large voltage change across the transient suppression device as the current conducted by the transient suppression device increased. The impedance usually was in the order of one to ten (1-10) ohms. Consequently, the knee of the V-I characteristic curve was soft.
Technology advancements lead to electronic devices operating at lower voltages. Because the voltage across the transient suppressor device increased as the conducted current increased, the prior transient suppression device generally was not able to adequately protect electronic devices that operated at lower voltages such as voltages below about five volts (5 V) and especially voltages at lower voltages such as three volts (3 V) or one and eight tenths of a volt (1.8 V) or less.
Accordingly, it is desirable to have a transient suppression device that has a lower impedance, that has a sharper knee of the V-I characteristic curve, that has a lower leakage current, and that operates at voltages of less than about five volts (5 V).
For simplicity and clarity of the illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. It will be appreciated by those skilled in the art that the words during, while, and when as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as a propagation delay, between the reaction that is initiated by the initial action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be very close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles.
Device 10 is formed to have a low impedance and a sharp V-I characteristic curve in order to assist in protecting equipment 83. In one embodiment, device 10 is formed with a clamp voltage that is less than about five volts (5 V). Device 10 usually is configured as a two terminal device having an input terminal 12 and an output terminal 13. Device 10 also includes a vertical MOS transistor 16 that is coupled between terminals 12 and 13 to conduct a current 14 from terminal 12, through transistor 16 as a current 17, to terminal 13. A reference circuit 18 and an amplifier 25 of device 10 are coupled between terminals 12 and 13 to receive an input voltage from terminal 12. Reference circuit 18 includes an output 21 and amplifier 25 includes an output 33. As will be seen further hereinafter in the explanation of
During a transient event, the value of the voltage on terminal 81 (
Those skilled in the art will appreciate that resistors 29 and 30 also are used to control the gain of the amplifier so that the amplifier is stable and does not oscillate. In some embodiments, either or both of resistors 29 and 30 may be omitted.
In one example embodiment of device 24, diode 23 had a reverse breakdown voltage or a zener voltage of about five and one-half volts (5.5V), and the value of resistors 28, 29, 30, and 32 were, respectively, seven hundred thousand ohms (700 KΩ), twenty thousand ohms (20 KΩ), two thousand ohms (2 KΩ), and twenty thousand ohms (20 KΩ). The resulting threshold voltage of device 24 was about seven volts (7V). As the input voltage reached about seven volts (7V) the value of current 14 was about one milli-amperes (1 mA). As the value of current 17 (and current 14) increased to about five amperes (5A) the value of the voltage across terminals 12 and 13 increased to about seven and one-tenth volts (7.1V). This represents a variation from the target value of only about one and fourth tenths of a percent (1.4%). It is believed that prior art devices would have a variation of at least five percent (5%). The above example results in an impedance for device 24 of about twenty milli-ohms (20 mΩ). This is much lower than the impedance of prior art devices which generally were about one to ten (1-10) ohms. The value of current 14 could be even larger and in some cases may be ten amperes (10 A) or larger.
In order to facilitate these advantages of device 24, output 21 is connected to an input of amplifier 26. An anode of diode 23 is connected to output 21 and a cathode is connected to terminal 12. A first terminal of resistor 20 is connected to output 21 and a second terminal is connected to terminal 13. A gate of transistor 27 is connected to the input of amplifier 26 and a source of transistor 27 is connected to a first terminal of resistor 29. A second terminal of resistor 29 is connected to terminal 13. A drain of transistor 27 is commonly connected to a gate of transistor 31 and a first terminal of resistor 28. A second terminal of resistor 28 is connected to input terminal 12. A source of transistor 31 is connected to a first terminal of resistor 30 which has a second terminal connected to terminal 13. A drain of transistor 31 is commonly connected to output 33 and to a first terminal of resistor 32. A second terminal of resistor 32 is connected to terminal 12. The gate of transistor 16 is connected to output 33, a source of transistor 16 is connected to terminal 13, and a drain is connected to terminal 12.
As the value of the input voltage reaches the threshold voltage of reference 61, transistor 62 begins to conduct current 22. Current 22 forms a voltage across resistor 63 and at output 21. When current 22 is sufficient for the voltage on output 21 to approximately equal the threshold voltage of transistor 27, transistor begins to conduct. The remainder of the operation of device 60 is the same as device 24. Thus, the threshold voltage for device 60 is the threshold voltage of reference 61 plus the threshold voltage of transistor 27.
In order to facilitate the advantages of device 60, a first terminal of resistor 63 is connected to terminal 13 and a second terminal of resistor is connected to output 21. A source of transistor 62 is connected to output 21 and a gate and drain are commonly connected to terminal 12.
During normal operation of device 65, transistor 27 is off so resistor 40 pulls the gate of transistor 45 to the voltage on input terminal 12 and disables transistor 45. The voltage on the gate of transistor 45 also enables transistor 44 which pulls the gate of transistor 16 near to the voltage of terminal 13 thereby disabling transistor 16. Since transistor 45 is disabled, current 36 does not flow even though transistor 44 is enabled, and since transistor 27 is disabled current 34 also does not flow, thereby lowering the power dissipation of device 65.
During a transient event, the voltage between terminals 12 and 13 increases to the value of the threshold voltage of circuit 66 which enables transistor 68 and current 22 flows through resistor 67 forming a voltage on output 21. When transistor 68 is enabled, the gate-to-source voltage of transistor 68 is applied to the gate of transistor 27 thereby enabling transistor 27. Transistor 27 pulls the gate of transistor 44 to a voltage near the voltage on terminal 13 thereby disabling transistor 44. Current 34 flowing through resistors 40 and 41 forms a voltage that pulls the gate of transistor 45 to a voltage that is lower than the voltage of terminal 12 by at least a threshold voltage of transistor 45 thereby enabling transistor 45. The value of resistors 40 and 41 are selected to provide this operation and ensure that transistor 45 is enabled and that transistor 44 is disabled. Transistor 45 has sufficient gain to quickly enable transistor 16. Using the active pull-up of transistor 45 instead of the resistive pull-up of amplifier 26 (
A source of transistor 68 is connected to terminal 13 and a gate is commonly connected to a drain of transistor 68, to output 21, and to a first terminal of resistor 67. A second terminal of resistor 67 is connected to terminal 12. A gate of transistor 27 is connected to output 21 and a source of transistor 27 is connected to terminal 13. A drain of transistor 27 is commonly connected to a gate of transistor 44 and a first terminal of resistor 41. A second terminal of resistor 41 is commonly connected to a gate of transistor 45 and to a first terminal of resistor 40. A second terminal of resistor 40 is commonly connected to terminal 12 and to a source of transistor 45. A drain of transistor 45 is connected to a first terminal of resistor 46. A second terminal of resistor 46 is commonly connected to output 33 and a first terminal of resistor 47. A second terminal of resistor 47 is connected to a drain of transistor 44 which has a source connected to terminal 13.
In view of all of the above, it is evident that a novel device and method is disclosed. Included, among other features, is forming a vertical MOS transistor to clamp the input and output terminals to a low voltage. An amplifier is used to amplify a reference signal from a reference circuit and enable the vertical MOS transistor. The gain of the amplifier and the low on-resistance of the vertical MOS transistor assist in keeping the clamp voltage to a low value for large values of current thereby providing the desired protection.
While the subject matter of the invention is described with specific preferred and exemplary embodiments, it is evident that many alternatives and variations will be apparent to those skilled in the art. As will be appreciated by those skilled in the art, the exemplary form of transistor 16 as a vertical MOS power transistor and the exemplary form of the reference circuits are used as vehicles to explain the operation method of amplifying the reference signal and clamping the voltage. Those skilled in the art will understand that various types of reference circuits and amplifier circuits may be used instead of the exemplary embodiments illustrated herein. Additionally, the word “connected” is used throughout for clarity of the description, however, it is intended to have the same meaning as the word “coupled”. Accordingly, “connected” should be interpreted as including either a direct connection or an indirect connection.
