Claims
- 1. A method of forming a transistor in a semiconductor active area, comprising:forming a gate structure in a fixed relationship to the semiconductor active area thereby defining a first source drain region adjacent to a first edge of said gate structure and a second source drain region adjacent to a second edge of said gate structure wherein said second edge of said gate is opposite said first edge of said gate; forming a mask over a first portion of said first source drain region and over a first portion of said second source drain region; implanting first dopants into a second portion of said first source drain region and into a second portion of said second source drain region wherein said second portion of said first source drain region and said second portion of said second source drain region are not covered by said mask and said first portion and said second portion are adjacent to said gate; removing said mask; and implanting second dopants into said first source drain region and into said second source drain region.
- 2. The method of claim 1 wherein said implanting said first dopants forms lightly doped regions.
- 3. The method of claim 2 further comprising:forming a first sidewall adjacent said first edge of said gate structure; and respectively; and forming a second sidewall adjacent said second edge of gate structure.
- 4. A method of forming a transistor in a semiconductor active area, comprising:forming a gate structure in a fixed relationship to the semiconductor active area thereby defining a first source drain region adjacent to a first edge of said gate structure and a second source drain region adjacent to a second edge of said gate structure wherein said second edge of said gate is opposite said first edge of said gate; forming a mask over a first portion of said first source drain region; implanting first dopants into a second portion of said first source drain region and into second source drain region wherein said second portion of said first source drain region is not covered by said mask and said first portion and said second portion are adjacent to said gate; removing said mask; and implanting second dopants into said first source drain region and into said second source drain region.
- 5. The method of claim 4 wherein said implanting said first dopants forms lightly doped regions.
- 6. The method of claim further comprising:forming a first sidewall adjacent said first edge of said gate structure; and forming a second sidewall adjacent said second edge of said gate structure.
CROSS-REFERENCES TO RELATED APPLICATIONS
This application claims priority under 35 USC § 119(e)(1) of provisional application Ser. No. 60/257,489, filed Dec. 21, 2000.
US Referenced Citations (8)
Foreign Referenced Citations (1)
Number |
Date |
Country |
8-172135 |
Jul 1996 |
JP |
Non-Patent Literature Citations (1)
Entry |
JP 8-172135 English Language Abstract (Miyagi) Jul. 2,1996, [online], [retrieved on Nov. 13, 2002] Retrieved from the Industrial Property Digital Library of the Japanese Patent Office using internet <URL: http://www.ipdl.jpo.go.jp/homepg_e.ipdl>. |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/257489 |
Dec 2000 |
US |