The present invention relates generally to image sensors for use in digital cameras and other types of image capture devices, and more particularly to trench isolation regions in image sensors.
An electronic image sensor typically captures images using an array of pixels, with each pixel including a light-sensitive photodetector for converting incident light into photo-generated charges. One concern with image sensors is electrical crosstalk, which occurs when photo-generated charges migrate from one photodetector to an adjacent photodetector. To reduce electrical crosstalk and isolate the photodetectors from one another, isolation regions are fabricated between adjacent photodetectors or pixels.
One example of an isolation region is trench isolation. There are two types of trench isolation regions, shallow trench isolation (STI) regions and deep trench isolation (DTI) regions. STI regions are typically used to electrically isolate the source and drain regions of a transistor in one pixel from the source and drain regions in an adjacent pixel. Therefore, STI regions commonly have a depth of 0.3 to 0.5 micrometers.
DTI regions are manufactured so as to be substantially deeper than STI regions as a way to reduce or prevent the lateral diffusion of charge carriers within the substrate, thereby reducing pixel-to-pixel crosstalk. For example, since the absorption depth of red light in silicon is about three micrometers, such DTI regions might be formed, for example, to have a depth of two to four micrometers.
Unfortunately, interfaces 110 between DTI regions 104 and layer 106 are sources for dark current and point defects. To reduce the dark current and point defects, each interface is conventionally passivated by implanting one or more dopants into the trenches (see
Due to the thickness of mask layer 200 and the high aspect ratio (height/width) of trenches 202, the dopants are not always successfully implanted into the sidewalls and bottom of trenches 202. The angle at which the dopants are implanted into trenches 202 cannot compensate for the thickness of mask layer 200 and the high aspect ratio of trenches 202. Consequently, the dopants are not implanted, or not effectively implanted, into the sidewall or bottom surfaces of trenches 202. This can result in higher levels of dark current and point defects because interfaces 110 are not be sufficiently passivated.
An image sensor includes an imaging area that includes a plurality of pixels, with each pixel including a photodetector formed in a substrate or in a layer in or on the substrate. One or more trench isolation regions are also formed in the substrate or layer. The trench isolation regions can be shallow or deep trench isolation regions that are formed between pixels, between groups of two or more pixels, or outside the imaging area to isolate the pixels from other electronic components in the image sensor.
After the trenches are etched into the substrate or layer, an optional liner layer of oxide is formed along the sidewall and bottom surfaces of the trenches. A solid source doped with one or more dopants is then deposited over the image sensor such that the solid source fills the one or more trenches and is disposed on the surface of the substrate. Examples of a solid source doped with one or more dopants include, but are not limited to, a doped polysilicon or a doped oxide.
The surface of the image sensor is then planarized so that the solid source remains only in the trenches. A thermal drive operation is performed to cause at least a portion of the one or more dopants in the solid source to diffuse into the substrate or layer. In particular, the dopant or dopants are driven into the portions of the substrate or layer that are immediately adjacent to and surround the sidewall and bottom surfaces of the trenches. The diffused dopant or dopants form passivation regions that passivate the interface between the substrate or layer and the sidewall and bottom surfaces of the trenches. The surfaces between the trench isolation regions are then polished smooth and an optional insulating layer may be formed over the image sensor.
The present invention increases the quantum efficiency of a pixel and reduces electrical crosstalk between adjacent pixels. The present invention also passivates the trench interfaces to reduce dark current generation and point defects.
Throughout the specification and claims the following terms take the meanings explicitly associated herein, unless the context clearly dictates otherwise. The meaning of “a,” “an,” and “the” includes plural reference, the meaning of “in” includes “in” and “on.” The term “connected” means either a direct electrical connection between the items connected or an indirect connection through one or more passive or active intermediary devices. The term “circuit” means either a single component or a multiplicity of components, either active or passive, that are connected together to provide a desired function. The term “signal” means at least one current, voltage, or data signal.
Additionally, directional terms such as “on”, “over”, “top”, “bottom”, are used with reference to the orientation of the Figure(s) being described. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration only and is in no way limiting. When used in conjunction with layers of an image sensor wafer or corresponding image sensor, the directional terminology is intended to be construed broadly, and therefore should not be interpreted to preclude the presence of one or more intervening layers or other intervening image sensor features or elements. Thus, a given layer that is described herein as being formed on or formed over another layer may be separated from the latter layer by one or more additional layers.
And finally, the terms “wafer” and “substrate” are to be understood as a semiconductor-based material including, but not limited to, silicon, silicon-on-insulator (SOI) technology, doped and undoped semiconductors, epitaxial layers formed on a semiconductor substrate, and other semiconductor structures.
Referring to the drawings, like numbers indicate like parts throughout the views.
In digital camera 300, light 302 from a subject scene is input to an imaging stage 304. Imaging stage 304 can include conventional elements such as a lens, a neutral density filter, an iris and a shutter. Light 302 is focused by imaging stage 304 to form an image on image sensor 306. Image sensor 306 captures one or more images by converting the incident light into electrical signals. Digital camera 300 further includes processor 308, memory 310, display 312, and one or more additional input/output (I/O) elements 314. Although shown as separate elements in the embodiment of
Processor 308 maybe implemented, for example, as a microprocessor, a central processing unit (CPU), an application-specific integrated circuit (ASIC), a digital signal processor (DSP), or other processing device, or combinations of multiple such devices. Various elements of imaging stage 304 and image sensor 306 may be controlled by timing signals or other signals supplied from processor 308.
Memory 310 may be configured as any type of memory, such as, for example, random access memory (RAM), read-only memory (ROM), Flash memory, disk-based memory, removable memory, or other types of storage elements, in any combination. A given image captured by image sensor 306 may be stored by processor 308 in memory 310 and presented on display 312. Display 312 is typically an active matrix color liquid crystal display (LCD), although other types of displays may be used. The additional I/O elements 314 may include, for example, various on-screen controls, buttons or other user interfaces, network interfaces, or memory card interfaces.
It is to be appreciated that the digital camera shown in
Referring now to
Functionality associated with the sampling and readout of imaging area 402 and the processing of corresponding image data may be implemented at least in part in the form of software that is stored in memory 310 and executed by processor 308 (see
Pixel 400 includes photodetector 500 that generates and stores charge in response to light striking photodetector 500. Transfer gate 502 is used to transfer the integrated charge in photodetector 500 to charge-to-voltage conversion mechanism 504. Charge-to-voltage conversion mechanism 504 converts the charge into a voltage signal. Source-follower transistor 506 buffers the voltage signal stored in charge-to-voltage conversion mechanism 504. Reset transistor 504, 508, 510 is used to reset charge-to-voltage conversion mechanism 504 to a known potential prior to pixel readout. And power supply voltage (VSS) 512 is used to supply power to source follower transistor 506 and drain off signal charge from charge-to-voltage conversion mechanism 504 during a reset operation.
Photodetector 500 is implemented as a pinned photodiode consisting of n+ pinning layer 514 and p-type collection region 516 formed within p-type epitaxial layer 518. Buried n-type layer 520 is formed within a portion of epitaxial layer 518.
Trench isolation regions 522 are formed between the pixels, or between groups of two or more pixels, to isolate the pixels or groups of pixels from one another. In another embodiment in accordance with the invention, trench isolation regions 522 are formed outside the imaging area to isolate the pixels from other devices in the image sensor. In the embodiment of
Interface 524 resides between trench isolation regions 522 and pinning layer 514 and epitaxial layer 518 in the embodiment shown in
Referring now to
A mask layer 604, such as a photoresist, is deposited and patterned over the image sensor to form openings 606 where trench isolation regions are to be formed (see
Next, as shown in
Trenches 610 are shown as etched within layer 602 in
Photoresist layer 604 is then removed and a liner layer 612 of oxide is thermally grown on the sidewall and bottom surfaces of trenches 610 (see
In one embodiment in accordance with the invention, doped solid source 612 is implemented as a heavily doped oxide or heavily doped polysilicon. In an NMOS image sensor, the doped solid source is doped with one or more p-type dopants. Examples of p-type dopants include, but are not limited to, boron or indium. In a PMOS image sensor, the doped solid source is doped with one or more n-type dopants. Phosphorus, arsenic, and antimony are examples of n-type dopants. Arsenic or antimony is preferred in one or more embodiments in accordance with the invention because these dopants have lower diffusivity in silicon. This lower diffusivity prevents the dopants from spreading into, or under, the collection regions of the photodetectors.
Next, as shown in
The image sensor is then subject to high temperature thermal drive operation to cause at least a portion of the dopants in the doped solid source in trenches 610 to diffuse into layer 602 in an embodiment in accordance with the invention. In particular, the dopants are driven into the portions of layer 602 that are immediately adjacent to and surround the sidewall and bottom surfaces of trenches 610. Trenches 610 reduce pixel-to-pixel crosstalk between adjacent pixels and the diffused dopants form passivation regions 616 that passivate the interface between layer 602 and the sidewall and bottom surfaces of trenches 610.
Referring now to
The invention has been described with reference to particular embodiments in accordance with the invention. However, it will be appreciated that variations and modifications can be effected by a person of ordinary skill in the art without departing from the scope of the invention. By way of examples only, an image sensor can be implemented as a charge-coupled device (CCD) image sensor. An image sensor can be configured as an n-type metal-oxide-semiconductor (NMOS) image sensor. The present invention can be included in a back-illuminated image sensor or an image sensor having no wells (e.g., NMOS pixels). Photodetector 500 (