Patent Application
20080294415
Model-based diagnosis (MBD) involves model-based testing in which test cases are derived in whole or in part from a model that describes some, usually functional, aspects of the system under test. The model is usually an abstract, partial representation of the system under test-desired behavior. The test cases derived from this model are functional tests on the same level of abstraction as the model.
Model-based diagnosis is diagnostic and system-directed. Particularly, it starts with the observed misbehavior and works back toward the underlying components that may be broken.
Model-based diagnosis may be employed in a variety of arenas, including detecting faulty system behavior, identifying faulty components, repairing of the system, and reconfiguring of the system. Other areas to which MBD may be applied, include debugging cognitive models, designing experiments to build improved models of gene pathways, troubleshooting power grids, troubleshooting manufacturing lines, identifying faults in spacecraft, airplanes, and debugging programs, among other uses.
However, an issue related to the diagnosis of systems using MBD as well as other testing approaches, such as “ad hoc” hand-coded rules, machine learning of patterns, D-algorithm searching, and analytical redundancy relationships, among others, concerns digital circuits that may contain intentional or unintentional cycles in its combinational logic. Particularly, such circuits often produce instant contradictions when analyzed at the logical gate level.
Therefore, the present application addresses the challenge of reasoning and diagnosing such digital circuits, as these intentional or unintentional cycles can lead to oscillatory behavior or convert what seems at first to be a combinational circuit into to a sequential one.
U.S. application Ser. No. 11/940,493 (Attorney Docket 20070162-US-NP/XERZ 2 01589 filed Nov. 15, 2007, entitled “DIAGNOSING INTERMITTENT FAULTS”, by Johan de Kleer; and U.S. application Ser. No. 11/925,444 (Attorney Docket 20070258-US-NP/XERZ201588 filed Oct. 30, 2007, entitled “DYNAMIC DOMAIN ABSTRACTION THROUGH META-ANALYSIS”, by Johan de Kleer.
A method and computer product is provided to generate a signal model for use in analyzing a model system including imposing an explicit time assumption for each time instant of the system model. The time assumptions are defined so that any two assumptions contradict each other, thereby separating all inferences into the respective times. A non-monotonic rule is applied to instantiate component models of the model system. Results are defined as not depending on the existence of a previous time instant and, a simplified signal model is generated, wherein the signal model represents the evolution of a value in the model system over time.
The GDE framework includes having the behavior of components expressed as constraints or as conventional rules. GDE can use an Assumption-Based Truth Maintenance System (ATMS) to record all the conclusions it draws from these models and the observations.
GDE computes a posterior probability for each candidate diagnosis. Given component failure probabilities and assuming components fail independently, GDE assigns a prior probability to each diagnosis. As observations accumulate the (posterior) probabilities of diagnoses shift according to Bayes' rule. Candidate diagnoses which are logically eliminative by the evidence receive probability 0. Although GDE uses the consistency-based definition of diagnosis (as opposed to the abductive definition), applying Bayes' rule raises the posterior probabilities of those diagnoses that entail the observation compared with those that are just consistent with it. As a consequence, its use of Bayes' rule to update probabilities results in GDE exhibiting a synthesis of the properties of consistency-based diagnosis and of abduction-based diagnosis.
To determine what is actually wrong with a system usually requires obtaining additional measurements. In one embodiment, GDE performs sequential diagnosis by choosing the best measurement to make next. It commonly uses a one-step look-ahead function based on minimum entropy (e.g., a myopic minimum entropy strategy). GDE proposes a set of measurements to make which will, on average, require a minimum number of measurements to localize the correct diagnosis.
An Assumption-based Truth Maintenance System (ATMS) and Hybrid-Truth Maintenance System (HTMS) framework involves, a propositional inference engine designed to simplify the construction of problem solvers that search complex problem spaces efficiently. The ATMS represents problem states with assumptions, which correspond to primary binary choices, and nodes, which correspond to propositions whose truth is dependent on the truth of the assumptions. Dependency relationships among assumptions and nodes are determined by a domain-specific problem solver such as a conventional inference engine. The problem solver presents these relationships to the ATMS as clauses and justifications. The ATMS determines which combinations of assumptions are consistent and identifies the conclusions to which they lead.
The ATMS is conventionally utilized by combining it with a conventional inference engine appropriate to the problem being solved. The extension includes a propositional reasoner and an interface that receives calls from the inference engine, passes them to the propositional reasoner, and returns results to the inference engine. The inference engine, the interface, and the propositional reasoner all run on a single serial processor, through conventional programming techniques.
The concepts described herein are directed to creating models which represent signals over time. These new models provide a way to analyze and successfully troubleshoot digital circuits that may contain intentional or unintentional cycles in the combinational logic of such circuits. In one embodiment this is accomplished by providing a temporal extension to the known GDE framework. The temporal analyses presented here may extend both the basic GDE-style models and connection models which do not require special-case post-processing and which are computationally tractable. In this application the following simplifying assumptions are made:
Consider the three inverter circuit of
However, using a usual model for gates, for example as in a GDE framework or extended models for connections which do not require special-case post-processing and which are computationally tractable, the system, such as the GDE system, will immediately detect a contradiction concluding that at least one of the components or nodes is necessarily faulted. This is true even though in a real world (e.g., physical world) implementation, none of the inverters may be faulted. Therefore the issue is with the modeling used to perform the investigation and/or analysis.
The conventional GDE model for an inverter is:
Modeling an inverter as having a single delay Δ, the model changes to:
To accommodate connection failures, signals on wires must be modeled at a more detailed level. Each terminal of a component is modeled with two variables, one which models how the component is attempting to influence its output (roughly analogous to current), and the other which characterizes the result (roughly analogous to voltage). For a correctly functioning node, these voltage-like variables are equal. There are 5, mutually inconsistent, qualitative values for the influence of a component on a node (we refer to these as “drivers” “d”).
Intuitively, these 5 qualitative values describe the range of possible current sinking/sourcing behaviors of a component terminal. A direct short to ground can draw a large current inflow. A direct power to ground can drive a large current outflow. There are three possible qualitative values for the result variable (“s”):
With these connection models, the inverter is modeled as:
Modeling the inverter to more accurately describe both temporal and causal behavior:
Our implementation is based on the ATMS/HTMS structure. Each time instant is modeled by an explicit assumption t=i and any two time assumptions contradict each other. These assumptions separate all inferences into their respective times. However, to instantiate the component models which incorporate evolving time, a non-monotonic ATMS rule is required. An instantiation of the model for a particular inverter A is encoded in the following two clauses (the implication xy
. . . →z is equivalent to the logical clause
x v
y v . . . →z and the literal
(q=0) is equivalent to literal q=1):
However, time is implicitly represented, by explicit assumptions. So the assumption for t=i would be implicit in any deduction for in(A, i). Any deduction of in(A) will have a single t=i assumption. We introduce a new modal operator N which specifies that its argument holds in the next point beyond its antecedent. So the two inverter clauses become:
These clauses are modeled in the ATMS by the following non-monotonic inference rule: Every (final or intermediate) prime implicate of the form,
This rule is non-monotonic because the result no longer depends on the existence of the previous time instant. Without this inference rule, it would not be possible to model evolution of time as time is inherently non-monotonic.
An advantage of this scheme to represent time is that it is not necessary to make multiple copies of component models for each time. Once the clauses representing the system model are represented, all further propagations are accomplished through the ATMS.
Suppose the input to the first inverter of the ring oscillator is observed to be 0 at t1. Inference proceeds as follows:
(t = 1)
N[out(A) = 1]
(t = 2)
[out(A) = 1]
AB(B)
(t = 2)
N[out(B) = 0]
AB(B)
(t = 3)
[out(B) = 0]
AB(B)
AB(C)
(t = 3)
N[out(C) = 1]
AB(B)
AB(C)
(t = 4)
[out(C) = 1]
AB(B)
AB(C)
(t = 4)
N[out(A) = 0]
AB(B)
AB(C)
(t = 5)
out(A) = 0
All subsequent inferences follow the same pattern. No new assumptions will be added.
Applying the temporal models produces the envisionment 80 of
The notation f(g, t) (e.g., in(A, t)) to represent values is a clumsy approach to represent a changing value for time (a fluent). We introduce a notion of signal:
Definition 1: A signal represents the evolution of a value over time (at the granularity of a gate delay). It is represented by a sequence of symbols drawn from 0,1,?,>,*. 0,1 indicate their respective values, “?” indicates the value is unknown, “>” indicates a large (unknown) number of gate delays, and “*” means that the following pattern repeats. A signal may have only one “*” and it must occur at the earliest possible place. We call signals containing a * followed by both 1's and 0's as definitely oscillatory. We call signals in which * is followed by exactly one symbol 0 or 1 as steady. Examples of valid signals are:
Signals are used to describe all of a system's variables.
On the surface, these derivations don't seem to have much diagnostic power, as in most cases the signals will be depend on the non-ABnormal behavior of all the components of the system.
To illustrate the diagnostic power of inferring complex signals consider a slightly more complex ring oscillator 150 of
The observation *0 is propagated (as it would if a simple 0 were observed). If all components are equally likely to fail, the usual GDE probing strategy will choose the next measurement (either the output of B or C) and the gate causing the failure to oscillate can be isolated as usual. More intuitively, as we are observing the system when all observations and inputs are steady, the circuit looks like circuit 160 of
Consider now circuit 170 of
The preceding discussion illustrated a process and system which allows for the troubleshooting or analysis of temporal behavior in combinatorial circuits. In a general sense, and as described in
The overview flow diagram of
These concepts are at times more particularly applied to a GDE framework as shown in the flow diagram of
Others have focused on troubleshooting analog oscillators which stopped oscillating, as well as on simulating CMOS designs with Qualitative Reasoning Systems or Software (QSIM). Neither approach generalized to explicitly recording assumptions of good behavior in order to isolate the malfunctioning component through more observations.
The preceding discussion focused on providing an improved system and method of diagnosing faults of a system under test. As previously mentioned, such diagnostic testing can be implemented in a wide range of areas. For example, as shown in
It is to be understood that body 202 includes computational capabilities including at least a processor 214 and memory 216, which permits the processing of software code, including code incorporating the concepts described herein. Still further, diagnostic device or system 200 may include output 218, for connection to an output device 219 to permit the printing of hardcopies of output reports, verbally stating the output reports, or otherwise communicating the same regarding the results of the analysis or diagnostic investigation.
It is to be appreciated the above description may be implemented on customized diagnostic devices, and/or may be included as part of hand-held computers, laptops, desktops or other computing devices, including personal digital assistants. Still further, the diagnostic device or system 200 is intended only as examples of how the concepts of the present application may be implemented.
In another embodiment,
In another embodiment illustrated in
This research has extended the GDE framework with a simple vocabulary to represent signals over time. The same basic architecture and inferential machinery as GDE can be used to propagate these generalized signals. Discrepancies between observed and predicted generalized signals can guide diagnosis to isolate the faulty system component(s). These generalized signals capture temporal behavior over time so they can be used to troubleshoot sequential circuits (e.g., containing flip-flops) as well. Sequential circuits can be hard to diagnose because no symptom maybe observable at quiescence. With these extensions GDE can be used to troubleshoot a far wider range of circuits than previously.
It will be appreciated that various of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications. Also that various presently unforeseen or unanticipated alternatives, modifications, variations or improvements therein may be subsequently made by those skilled in the art which are also intended to be encompassed by the following claims.
This application claims priority to U.S. Provisional Application No. 60/931,526, filed May 24, 2007, entitled “Troubleshooting Temporal Behavior in ‘Combinational’Circuits” by Johan de Kleer, the disclosure of which is hereby incorporated by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 60931526 | May 2007 | US |
