1. Field of the Invention
The subject matter of this application relates to photolithography systems. More particularly, the subject matter of this application relates to methods and devices for forming symmetric contact holes on semiconductor devices.
2. Background of the Invention
Lithographic projection apparatus (tools) can be used, for example, in the manufacture of integrated circuits (ICs). When using the various tools, a mask can be used that contains a circuit pattern corresponding to an individual layer of the IC, and this pattern can be imaged onto a target portion (e.g., comprising one or more dies) on a substrate, such as a silicon or other wafer comprising a semiconductor, that has been coated with a layer of radiation-sensitive material, such as a resist. In general, a single wafer may contain a network of adjacent target portions that can be successively irradiated using a projection system of the tool, one at a time. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask design onto the target portion in one shot. In another apparatus, which is commonly referred to as a step-and-scan apparatus, each target portion is irradiated by progressively scanning the mask design under the projection beam in a given reference direction (the “scanning” direction) while synchronously scanning the substrate table parallel or anti-parallel to the scanning direction. Because the projection system typically has a magnification factor M, which is generally less than 1, the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned.
In a manufacturing process using a lithographic projection apparatus, a mask design can be imaged onto a substrate that is at least partially covered by a layer of resist. Prior to this imaging step, the substrate may undergo various procedures, such as, priming, resist coating, and a soft bake. After exposure, the substrate can be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake, and a measurement/inspection of the image structures. This array of procedures can be used as a basis to pattern an individual layer of a device, such as an IC. Such a patterned layer may then undergo various processes, such as etching, ion-implantation, doping, metallization, oxidation, chemical mechanical polishing (CMP), etc., all intended to complete an individual layer. If several layers are required, then part or all of the procedure, or a variant thereof, may need to be repeated for each new layer. Eventually, an array of structures, and ultimately devices can be present on the substrate. These devices can then be separated from one another by a technique such as dicing or sawing. Thereafter, the individual devices can be mounted on a carrier, connected to pins, etc.
The lithographic tool may be of a type having two or more substrate tables (and/or two or more mask tables). In such “multiple stage” devices, the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure.
The photolithography masks referred to above comprise geometric features corresponding to the circuit components to be integrated onto a substrate. The layout used to create such masks are typically generated using computer-aided design (CAD) programs, sometimes called electronic design automation (EDA). Most CAD programs follow a set a predetermined design rules in order to create functional masks. These rules are set by processing and design limitations. For example, design rules attempt to define the space tolerance between circuit devices, such as contact holes, gates, capacitors, etc., or interconnect lines, so as to ensure that the circuit devices or lines do not interact with one another in an undesirable way.
One of the goals in IC fabrication is to faithfully reproduce the original circuit design from the layout on the wafer using the mask. Another goal is to use as much of the wafer real estate as possible. As the size of an IC is reduced and its density increases, however, the critical dimension (CD) of its corresponding mask design approaches the resolution limit of the optical exposure tool. The resolution for an exposure tool can be defined as the minimum feature sizes that the exposure tool can repeatedly expose on the wafer. The resolution value of present exposure tools often constrains the CD for many advanced IC designs.
Furthermore, the constant improvements in micro-processor speed, memory packing density, and low power consumption for micro-electronic components can be directly related to the ability of lithography techniques to transfer and form structures onto the various layers of a semiconductor device. In order to keep pace with Moore's law and develop sub-wavelength resolution, it has become necessary to use a variety of resolution enhancement techniques (RET).
Historically, the Rayleigh criteria for resolution (R) and depth of focus (DOF) have been used to evaluate the performance of a given technology. The Rayleigh criteria has been defined by:
R=k1λ/NA (1)
DOF=±k2λ/NA2 (2)
where k1 and k2 are process dependent factors, λ is wavelength, and NA is numerical aperture. Depth of focus is one of the factors determining the resolution of the lithographic apparatus and is defined as the distance along the optical axis over which the image of the feature is adequately sharp.
The control of the relative size of the illumination system numerical aperture (NA) has historically been used to optimize the resolution of a lithographic projection tool. Control of the NA with respect to the projection systems objective lens NA allows for modification of spatial coherence at the mask plane, commonly referred to as partial coherence (σ). This can be accomplished through the specification of the condenser lens pupil in various illumination systems.
Conventional condenser lens pupils are shown in
Illumination systems can be further refined by altering the path of illumination. A conventional on-axis illumination system 200 is shown in
Another illumination system 250, as shown in
Regardless of which illumination system is used, however, optical proximity effects can degrade the integrity of the printed structures. One problem caused by proximity effects using convention systems is an undesirable variation in feature CDs. For any leading edge semiconductor process, achieving tight control over the CDs of the features (i.e., circuit elements and interconnects) is typically the primary manufacturing goal, because that has a direct impact on wafer sort and completion of the final product.
As shown for example in
Using various lens pupils until now has not been successful in improving contact hole symmetry. For example,
Thus, there is a need to overcome these and other problems of the prior art to produce symmetric structures, such as contact holes, on a substrate.
In accordance with an embodiment the invention, there is a device manufacturing method. The method can comprise providing a substrate comprising a radiation-sensitive material disposed thereon and directing a beam of radiation through an aperture such that the radiation produces at least two illumination poles. The method can also comprise exposing the substrate to the at least two illumination poles using off-axis illumination and varying a size of a first illumination pole of the at least two illumination poles with respect to a second illumination pole of the at least two illumination poles.
In accordance with another embodiment the invention, there is a device manufactured by the method comprising providing a substrate comprising a radiation-sensitive material disposed thereon and directing a beam of radiation through an aperture such that the radiation produces at least two illumination poles. The method can also comprise exposing the substrate to the at least two illumination poles using off-axis illumination and varying a size of a first illumination pole of the at least two illumination poles with respect to a second illumination pole of the at least two illumination poles.
In accordance with another embodiment the invention, there is a computer readable medium comprising program code for controlling a lithography system. The computer readable medium can comprise program code for directing a beam of radiation through an aperture such that the radiation produces at least two illumination poles and program code for controlling the exposure of a substrate to the at least two illumination poles using off-axis illumination. The computer readable medium can also comprise program code for varying the size of a first illumination pole of the at least two illumination poles with respect to the size of a second illumination pole of the at least two illumination poles.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate several embodiments of the invention and together with the description, serve to explain the principles of the invention.
In the following description, reference is made to the accompanying drawings that form a part thereof, and in which is shown by way of illustration specific exemplary embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention and it is to be understood that other embodiments may be utilized and that changes may be made without departing from the scope of the invention. The following description is, therefore, not to be taken in a limited sense.
Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in their respective testing measurements. Moreover, all ranges disclosed herein are to be understood to encompass any and all sub-ranges subsumed therein. For example, a range of “less than 10” can include any and all sub-ranges between (and including) the minimum value of zero and the maximum value of 10, that is, any and all sub-ranges having a minimum value of equal to or greater than zero and a maximum value of equal to or less than 10, e.g., 1 to 5.
Another exemplary lens pupil design 600 having five illumination poles 602a-e is shown in
Another exemplary lens pupil design 700 having two illumination poles 702a and 702b is shown in
As shown in
According to various embodiments, a computer readable medium can be provided that configures a processor to control a lithography system, such as those described herein. The computer readable medium can include program code for directing a beam of radiation through an aperture such that the radiation produces at least two illumination poles and program code for controlling the exposure of a substrate to the at least two illumination poles using off-axis illumination. The computer readable medium can further include program code for varying the size, such as the diameter, a first illumination pole of the at least two illumination poles with respect to the size, such as the diameter, a second illumination pole of the at least two illumination poles.
According to various embodiments, the computer readable medium can include program code for directing a beam of radiation through an aperture such that the radiation produces at least two illumination poles. The computer readable medium can also include program code for controlling the exposure of a substrate to the at least two illumination poles using off-axis illumination and program code for varying the size of a first illumination pole of the at least two illumination poles with respect to the size of a second illumination pole of the at least two illumination poles.
According to various embodiments, the aperture controlled by the computer readable medium can produces a center illumination pole surrounded by four other illumination poles. Further, the center illumination pole can correspond to the first illumination pole. Moreover, the size of the first illumination pole can be varied by varying the diameter of the first illumination pole. Still further, the size of the first illumination pole can be varied such that the features on the substrate comprise an aspect ratio from 1.0 to 1.5.
While the invention has been illustrated with respect to one or more implementations, alterations and/or modifications can be made to the illustrated examples without departing from the spirit and scope of the appended claims. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular function. Furthermore, to the extent that the terms “including”, “includes”, “having”, “has”, “with”, or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term “comprising.”
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.