Chartered Semiconductor Manufacturing Pte Ltd

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Singapore, SG

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Patents Grantslast 30 patents

Information Patent Grant
Shield for wafer station
- Patent number 6,395,086
- Issue date May 28, 2002
- Chartered Semiconductor Manufacturing Pte Ltd
- Soon Ee Neoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked container capacitor using chemical mechanical polishing
- Patent number 5,808,855
- Issue date Sep 15, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming residue free patterned polysilicon layers upon h...
- Patent number 5,792,708
- Issue date Aug 11, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Mei Sheng Zhou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing copper interconnect with top barrier layer
- Patent number 5,744,376
- Issue date Apr 28, 1998
- Chartered Semiconductor Manufacturing Pte, Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional polysilicon capacitor for high density integrated...
- Patent number 5,744,853
- Issue date Apr 28, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Elgin Kiok Boone Quek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process having high tolerance to buried contact mask misalignment b...
- Patent number 5,742,088
- Issue date Apr 21, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for enhancement of wafer alignment accuracy
- Patent number 5,734,594
- Issue date Mar 31, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Ron-Fu Chu
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of making self-aligned silicide narrow gate electrodes for f...
- Patent number 5,731,239
- Issue date Mar 24, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Harianto Wong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for shallow trench isolation
- Patent number 5,728,621
- Issue date Mar 17, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antireflection mask for contact hole opening
- Patent number 5,728,493
- Issue date Mar 17, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Chet Ping Lim
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of manufacture of thin film transistor SRAM device with a ti...
- Patent number 5,721,163
- Issue date Feb 24, 1998
- Chartered Semiconductor Manufacturing Pte, Ltd.
- Ravishankar Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Narrow deep trench isolation process with trench filling by oxidation
- Patent number 5,721,174
- Issue date Feb 24, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Igor V. Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple storage planes read only memory integrated circuit device...
- Patent number 5,721,169
- Issue date Feb 24, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Bob Hsino-Lun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming vertical polysilicon diode compatible with CMOS/...
- Patent number 5,716,880
- Issue date Feb 10, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Purakh Raj Verma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual ion implantation process for gate oxide improvement
- Patent number 5,714,788
- Issue date Feb 3, 1998
- Chartered Semiconductor Manufacturing, PTE Ltd.
- Sukhum Ngaoaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Application of titanium nitride and tungsten nitride thin film resi...
- Patent number 5,710,070
- Issue date Jan 20, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Lap Chan
- B41 - PRINTING LINING MACHINES TYPEWRITERS STAMPS
Information Patent Grant
Method for preventing titanium lifting during and after metal etching
- Patent number 5,705,428
- Issue date Jan 6, 1998
- Chartered Semiconductor Manufacturing Pte, Ltd.
- Lianjun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antifuse structure and method for manufacturing it
- Patent number 5,705,849
- Issue date Jan 6, 1998
- Chartered Semiconductor Manufacturing Pte Ltd
- Jiazhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacture of self-aligned JFET
- Patent number 5,702,987
- Issue date Dec 30, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Wei Tony Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing SRAM cell structure having a tunnel oxide c...
- Patent number 5,700,707
- Issue date Dec 23, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Hsiao-Lun Bob Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical test structure to quantify microloading after plasma dry...
- Patent number 5,693,178
- Issue date Dec 2, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch stop for copper damascene process
- Patent number 5,693,563
- Issue date Dec 2, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Su-Ping Teong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making low profile shallow trench double polysilicon capa...
- Patent number 5,691,252
- Issue date Nov 25, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making SRAM cell with thin film transistor using two poly...
- Patent number 5,686,334
- Issue date Nov 11, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Ravishankar Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor contact metallization
- Patent number 5,677,238
- Issue date Oct 14, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Fang Hong Gn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polysilicon gate reoxidation in a gas mixture of oxygen and nitroge...
- Patent number 5,672,525
- Issue date Sep 30, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for self-aligned twin wells without N-well and P-well heigh...
- Patent number 5,670,395
- Issue date Sep 23, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming integrated CMP stopper and analog capacitor
- Patent number 5,670,410
- Issue date Sep 23, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- B24 - GRINDING POLISHING
Information Patent Grant
New chemical mechanical planarization (CMP) end point detection app...
- Patent number 5,667,424
- Issue date Sep 16, 1997
- Chartered Semiconductor Manufacturing Pte Ltd
- Yang Pan
- B24 - GRINDING POLISHING
Information Patent Grant
Method and apparatus for determination of the end point in chemical...
- Patent number 5,667,629
- Issue date Sep 16, 1997
- Chartered Semiconductor Manufactuing Pte, Ltd.
- Yang Pan
- B24 - GRINDING POLISHING

Patents Applicationslast 30 patents

Information Patent Application
HIGH PERFORMANCE LDMOS DEVICE HAVING ENHANCED DIELECTRIC STRAIN LAYER
- Publication number 20120119293
- Publication date May 17, 2012
- Chartered Semiconductor Manufacturing Ltd.
- Sanford Chu
- H01 - BASIC ELECTRIC ELEMENTS

Chartered Semiconductor Manufacturing Pte Ltd

Organization

Patents Grantslast 30 patents

Shield for wafer station

Stacked container capacitor using chemical mechanical polishing

Method for forming residue free patterned polysilicon layers upon h...

Method of manufacturing copper interconnect with top barrier layer

Three dimensional polysilicon capacitor for high density integrated...

Process having high tolerance to buried contact mask misalignment b...

Method and system for enhancement of wafer alignment accuracy

Method of making self-aligned silicide narrow gate electrodes for f...

Method for shallow trench isolation

Antireflection mask for contact hole opening

Method of manufacture of thin film transistor SRAM device with a ti...

Narrow deep trench isolation process with trench filling by oxidation

Multiple storage planes read only memory integrated circuit device...

Method for forming vertical polysilicon diode compatible with CMOS/...

Dual ion implantation process for gate oxide improvement

Application of titanium nitride and tungsten nitride thin film resi...

Method for preventing titanium lifting during and after metal etching

Antifuse structure and method for manufacturing it

Method of manufacture of self-aligned JFET

Method of manufacturing SRAM cell structure having a tunnel oxide c...

Electrical test structure to quantify microloading after plasma dry...

Etch stop for copper damascene process

Method of making low profile shallow trench double polysilicon capa...

Method of making SRAM cell with thin film transistor using two poly...

Semiconductor contact metallization

Polysilicon gate reoxidation in a gas mixture of oxygen and nitroge...

Process for self-aligned twin wells without N-well and P-well heigh...

Method of forming integrated CMP stopper and analog capacitor

New chemical mechanical planarization (CMP) end point detection app...

Method and apparatus for determination of the end point in chemical...

Patents Applicationslast 30 patents

HIGH PERFORMANCE LDMOS DEVICE HAVING ENHANCED DIELECTRIC STRAIN LAYER

Trademarklast 30 trademarks