Membership
Tour
Register
Log in
Logic Vision, Inc.
Follow
Organization
San Jose, CA, US
Organizations
Overview
Industries
People
People
Information
Transactions
Events
Impact
Please log in for detailed analytics
Patents Grants
last 30 patents
Information
Patent Grant
Fault insertion method, boundary scan cells, and integrated circuit...
Patent number
6,536,008
Issue date
Mar 18, 2003
Logic Vision, Inc.
Benoit Nadeau-Dostie
G01 - MEASURING TESTING
Information
Patent Grant
Method and apparatus for testing multi-port memory using shadow read
Patent number
6,046,946
Issue date
Apr 4, 2000
Logic Visions, Inc.
Benoit Nadeau-Dostie
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus for high-speed interconnect testing
Patent number
6,000,051
Issue date
Dec 7, 1999
Logic Vision, Inc.
Benoit Nadeau-Dostie
G01 - MEASURING TESTING
Information
Patent Grant
Bist architecture for measurement of integrated circuit delays
Patent number
5,923,676
Issue date
Jul 13, 1999
Logic Vision, Inc.
Stephen K. Sunter
G01 - MEASURING TESTING
Information
Patent Grant
Method and apparatus for testing multi-port memory
Patent number
5,812,469
Issue date
Sep 22, 1998
Logic Vision, Inc.
Benoit Nadeau-Dostie
G11 - INFORMATION STORAGE