QIMONDA NORTH AMERICA CORP.

Organization

Cary, NC, US

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
Method for manufacturing a phase change memory device with pillar b...
- Patent number 8,138,028
- Issue date Mar 20, 2012
- Macronix International Co., Ltd.
- Hsiang Lan Lung
- G11 - INFORMATION STORAGE
Information Patent Grant
Concentric phase change memory element
- Patent number 8,124,950
- Issue date Feb 28, 2012
- International Business Machines Corporation
- Thomas D. Happ
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for signal adjustment
- Patent number 7,977,987
- Issue date Jul 12, 2011
- Qimonda North America Corp.
- Josh Osborne
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current constricting phase change memory element structure
- Patent number 7,932,507
- Issue date Apr 26, 2011
- International Business Machines Corporation
- Chieh-Fang Chen
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method and circuit for transmitting a memory clock signal
- Patent number 7,886,122
- Issue date Feb 8, 2011
- Qimonda North America Corp.
- Jong-Hoon Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with control circuit for performing retention test
- Patent number 7,872,931
- Issue date Jan 18, 2011
- Qimonda North America Corp.
- Khaled Fekih-Romdhane
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including silicide region to inhibit parasitic c...
- Patent number 7,863,610
- Issue date Jan 4, 2011
- Qimonda North America Corp.
- Bipin Rajendran
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of flexible memory segment assignment using a single chip se...
- Patent number 7,822,910
- Issue date Oct 26, 2010
- Qimonda North America Corp.
- Rom-Shen Kao
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for signal adjustment
- Patent number 7,816,961
- Issue date Oct 19, 2010
- Qimonda North America
- Josh Osborne
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit including resistivity changing material having a...
- Patent number 7,812,333
- Issue date Oct 12, 2010
- Qimonda North America Corp.
- Jan Boris Philipp
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for addressing errors in a multiple-chip memory d...
- Patent number 7,802,133
- Issue date Sep 21, 2010
- Qimonda North America Corp.
- KoonHee Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory including buried word lines
- Patent number 7,800,093
- Issue date Sep 21, 2010
- Qimonda North America Corp.
- Thomas Happ
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory refresh system and method
- Patent number 7,797,511
- Issue date Sep 14, 2010
- Qimonda North America Corp.
- Thomas Vogelsang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having drift compensated read operation and associate...
- Patent number 7,796,424
- Issue date Sep 14, 2010
- Qimonda North America Corp.
- Thomas Happ
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having a bank with sub-banks
- Patent number 7,782,703
- Issue date Aug 24, 2010
- Qimonda North America Corp.
- Jong-Hoon Oh
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit that stores first and second defective memory ce...
- Patent number 7,773,438
- Issue date Aug 10, 2010
- Qimonda North America Corp.
- Khaled Fekih-Romdhane
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-mode voltage supply circuit
- Patent number 7,765,418
- Issue date Jul 27, 2010
- Qimonda North America Corp.
- Stephen Mann
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuit including an electrode having an outer portion w...
- Patent number 7,760,546
- Issue date Jul 20, 2010
- Qimonda North America Corp.
- Shoaib Zaidi
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage regulator pole shifting method and apparatus
- Patent number 7,755,338
- Issue date Jul 13, 2010
- Qimonda North America Corp.
- Iman Taha
- G05 - CONTROLLING REGULATING
Information Patent Grant
Memory device refresh method and apparatus
- Patent number 7,755,967
- Issue date Jul 13, 2010
- Qimonda North America Corp.
- Christopher Kunce
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including vertical diode
- Patent number 7,745,812
- Issue date Jun 29, 2010
- Qimonda North America Corp.
- Thomas Happ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Termination switching based on data rate
- Patent number 7,746,098
- Issue date Jun 29, 2010
- Qimonda North America Corp.
- Nicholas Heath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic system that adjusts DLL lock state acquisition time
- Patent number 7,728,638
- Issue date Jun 1, 2010
- Qimonda North America Corp.
- Jason Varricchione
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-level resistive memory cell using different crystallization s...
- Patent number 7,719,886
- Issue date May 18, 2010
- Qimonda North America Corp.
- Jan Boris Philipp
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for enabling a voltage regulator
- Patent number 7,719,244
- Issue date May 18, 2010
- Qimonda North America Corp.
- Benjamin Heilmann
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuit fabricated using an oxidized polysilicon mask
- Patent number 7,718,464
- Issue date May 18, 2010
- Qimonda North America Corp.
- Shoaib Zaidi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for implementing memory enabled systems using...
- Patent number 7,721,010
- Issue date May 18, 2010
- Qimonda North America Corp.
- Josef Schnell
- G11 - INFORMATION STORAGE
Information Patent Grant
Thermal isolation of phase change memory cells
- Patent number 7,714,315
- Issue date May 11, 2010
- Qimonda North America Corp.
- Thomas Happ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for selectively disabling termination circuitry
- Patent number 7,715,264
- Issue date May 11, 2010
- Qimonda North America Corp.
- Peter Meyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of simple chip select for memory subsystems
- Patent number 7,710,754
- Issue date May 4, 2010
- Qimonda North America Corp.
- Rom-Shen Kao
- G11 - INFORMATION STORAGE

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Patents Applicationslast 30 patents

Information Patent Application
CONCENTRIC PHASE CHANGE MEMORY ELEMENT
- Publication number 20120134204
- Publication date May 31, 2012
- QIMONDA NORTH AMERICA CORP.
- Thomas D. Happ
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Fabricating an Integrated Circuit Including Resistivity...
- Publication number 20100323493
- Publication date Dec 23, 2010
- QIMONDA NORTH AMERICA CORP.
- Jan Boris Philipp
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Including Vertical Bipolar Select Device and Resistive Memor...
- Publication number 20100321990
- Publication date Dec 23, 2010
- QIMONDA NORTH AMERICA CORP.
- Thomas Happ
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and Method for Manufacturing a Multiple-Chip Memory Device
- Publication number 20100306605
- Publication date Dec 2, 2010
- QIMONDA NORTH AMERICA CORP.
- KoonHee Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Including an Electrode Having an Outer Portion With G...
- Publication number 20100265763
- Publication date Oct 21, 2010
- QIMONDA NORTH AMERICAN CORP.
- Shoaib Zaidi
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus to Reduce Power Consumption by Transferring Fu...
- Publication number 20100124130
- Publication date May 20, 2010
- QIMONDA NORTH AMERICA CORPORATION
- Jong-Hoon Oh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT WITH CONTROL CIRCUIT FOR PERFORMING RETENTION TEST
- Publication number 20100091595
- Publication date Apr 15, 2010
- QIMONDA NORTH AMERICA CORP.
- Khaled Fekih-Romdhane
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Refresh Method and Apparatus
- Publication number 20100080075
- Publication date Apr 1, 2010
- QIMONDA NORTH AMERICA CORP.
- Christopher Kunce
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Data Bus Placement and Control
- Publication number 20100070676
- Publication date Mar 18, 2010
- QIMONDA NORTH AMERICA CORPORATION
- Hoon Ryu
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Mode Bus Inversion Method and Apparatus
- Publication number 20100057971
- Publication date Mar 4, 2010
- QIMONDA NORTH AMERICA CORPORATION
- Rom-Shen Kao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCENTRIC PHASE CHANGE MEMORY ELEMENT
- Publication number 20100054029
- Publication date Mar 4, 2010
- International Business Machines Corporation
- Thomas D. Happ
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT INCLUDING SELECTABLE ADDRESS AND DATA MULTIPLEXI...
- Publication number 20100034038
- Publication date Feb 11, 2010
- QIMONDA NORTH AMERICA CORP.
- Margaret Freebern
- G11 - INFORMATION STORAGE
Information Patent Application
MUSHROOM TYPE MEMORY CELL HAVING SELF-ALIGNED BOTTOM ELECTRODE AND...
- Publication number 20100019215
- Publication date Jan 28, 2010
- Macronix International Co., Ltd.
- Hsiang-Lan Lung
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Selectively Disabling Termination Circuitry
- Publication number 20090316511
- Publication date Dec 24, 2009
- QIMONDA NORTH AMERICA CORP.
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-Bank Memory Device Method and Apparatus
- Publication number 20090231943
- Publication date Sep 17, 2009
- QIMONDA NORTH AMERICA CORPORATION
- Christopher Kunce
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for controlling a semiconductor manufacturing pro...
- Publication number 20090215206
- Publication date Aug 27, 2009
- QIMONDA NORTH AMERICA CORP.
- Abeer Singhal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATION OF SINGLE CRYSTAL DIODES FOR RESISTIVE MEMORIES
- Publication number 20090176354
- Publication date Jul 9, 2009
- International Business Machines Corporation
- Bipin Rajendran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENABLE SIGNAL GENERATOR METHOD AND APPARATUS
- Publication number 20090175086
- Publication date Jul 9, 2009
- QIMONDA NORTH AMERICA CORPORATION
- Hoon Ryu
- G11 - INFORMATION STORAGE
Information Patent Application
Method and device for redundancy replacement in semiconductor devic...
- Publication number 20090168569
- Publication date Jul 2, 2009
- QIMONDA NORTH AMERICA CORP.
- Hoon Ryu
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT INCLUDING QUENCH DEVICES
- Publication number 20090154226
- Publication date Jun 18, 2009
- QIMONDA NORTH AMERICA CORP.
- Thomas Happ
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT INCLUDING DIODE MEMORY CELLS
- Publication number 20090154227
- Publication date Jun 18, 2009
- Qimonda North America Corp.
- Jan Boris Philipp
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY REFRESH METHOD AND APPARATUS
- Publication number 20090147606
- Publication date Jun 11, 2009
- QIMONDA NORTH AMERICA CORPORATION
- Alan Daniel
- G11 - INFORMATION STORAGE
Information Patent Application
Sense Amplifier Biasing Method and Apparatus
- Publication number 20090122591
- Publication date May 14, 2009
- QIMONDA NORTH AMERICA CORPORATION
- Hoon Ryu
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for addressing errors in a multiple-chip memory d...
- Publication number 20090006887
- Publication date Jan 1, 2009
- QIMONDA NORTH AMERICA CORP.
- KoonHee Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY REFRESH SYSTEM AND METHOD
- Publication number 20080313494
- Publication date Dec 18, 2008
- QIMONDA NORTH AMERICA CORP.
- Klaus Hummler
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit for stressing upper level interconnects in semic...
- Publication number 20080285358
- Publication date Nov 20, 2008
- QIMONDA NORTH AMERICA CORP.
- Klaus Nierle
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT WITH OPTICAL SWITCH
- Publication number 20080285912
- Publication date Nov 20, 2008
- QIMONDA NORTH AMERICA CORP.
- Shoaib Zaidi
- G02 - OPTICS
Information Patent Application
PEAK POWER REDUCTION USING FIXED BIT INVERSION
- Publication number 20080282001
- Publication date Nov 13, 2008
- QIMONDA NORTH AMERICA CORP.
- Thomas Vogelsang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for monitoring temperature in a multiple die package
- Publication number 20080267258
- Publication date Oct 30, 2008
- QIMONDA NORTH AMERICA CORP.
- Wolfgang Hokenmaier
- G05 - CONTROLLING REGULATING
Information Patent Application
Method and circuit for stressing upper level interconnects in semic...
- Publication number 20080237587
- Publication date Oct 2, 2008
- QIMONDA NORTH AMERICA CORP.
- Klaus Nierle
- G11 - INFORMATION STORAGE

QIMONDA NORTH AMERICA CORP.

Organization

Patents Grantslast 30 patents

Method for manufacturing a phase change memory device with pillar b...

Concentric phase change memory element

System and method for signal adjustment

Current constricting phase change memory element structure

Method and circuit for transmitting a memory clock signal

Integrated circuit with control circuit for performing retention test

Integrated circuit including silicide region to inhibit parasitic c...

Method of flexible memory segment assignment using a single chip se...

System and method for signal adjustment

Integrated circuit including resistivity changing material having a...

System and method for addressing errors in a multiple-chip memory d...

Resistive memory including buried word lines

Memory refresh system and method

Memory device having drift compensated read operation and associate...

Semiconductor memory having a bank with sub-banks

Integrated circuit that stores first and second defective memory ce...

Multi-mode voltage supply circuit

Integrated circuit including an electrode having an outer portion w...

Voltage regulator pole shifting method and apparatus

Memory device refresh method and apparatus

Integrated circuit including vertical diode

Termination switching based on data rate

Electronic system that adjusts DLL lock state acquisition time

Multi-level resistive memory cell using different crystallization s...

Method and apparatus for enabling a voltage regulator

Integrated circuit fabricated using an oxidized polysilicon mask

Method and apparatus for implementing memory enabled systems using...

Thermal isolation of phase change memory cells

Method and apparatus for selectively disabling termination circuitry

Method of simple chip select for memory subsystems

Patents Applicationslast 30 patents

CONCENTRIC PHASE CHANGE MEMORY ELEMENT

Method for Fabricating an Integrated Circuit Including Resistivity...

Memory Including Vertical Bipolar Select Device and Resistive Memor...

Apparatus and Method for Manufacturing a Multiple-Chip Memory Device

Memory Device Including an Electrode Having an Outer Portion With G...

Method and Apparatus to Reduce Power Consumption by Transferring Fu...

INTEGRATED CIRCUIT WITH CONTROL CIRCUIT FOR PERFORMING RETENTION TEST

Memory Device Refresh Method and Apparatus

Memory Data Bus Placement and Control

Multi-Mode Bus Inversion Method and Apparatus

CONCENTRIC PHASE CHANGE MEMORY ELEMENT

INTEGRATED CIRCUIT INCLUDING SELECTABLE ADDRESS AND DATA MULTIPLEXI...

MUSHROOM TYPE MEMORY CELL HAVING SELF-ALIGNED BOTTOM ELECTRODE AND...

Method and Apparatus for Selectively Disabling Termination Circuitry

Multi-Bank Memory Device Method and Apparatus

System and method for controlling a semiconductor manufacturing pro...

METHOD FOR FABRICATION OF SINGLE CRYSTAL DIODES FOR RESISTIVE MEMORIES

ENABLE SIGNAL GENERATOR METHOD AND APPARATUS

Method and device for redundancy replacement in semiconductor devic...

INTEGRATED CIRCUIT INCLUDING QUENCH DEVICES

INTEGRATED CIRCUIT INCLUDING DIODE MEMORY CELLS

MEMORY REFRESH METHOD AND APPARATUS

Sense Amplifier Biasing Method and Apparatus

System and method for addressing errors in a multiple-chip memory d...

MEMORY REFRESH SYSTEM AND METHOD

Method and circuit for stressing upper level interconnects in semic...

INTEGRATED CIRCUIT WITH OPTICAL SWITCH

PEAK POWER REDUCTION USING FIXED BIT INVERSION

System and method for monitoring temperature in a multiple die package

Method and circuit for stressing upper level interconnects in semic...