United Memories, Inc.

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Colorado Springs, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Linear progression delay register
- Patent number 9,350,338
- Issue date May 24, 2016
- United Memories, Inc.
- Jon Allan Faue
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Linear progression delay register
- Patent number 9,252,759
- Issue date Feb 2, 2016
- United Memories, Inc.
- Jon Allan Faue
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual-complementary integrating duty cycle detector with dead band n...
- Patent number 9,246,475
- Issue date Jan 26, 2016
- United Memories, Inc.
- Oscar Frederick Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Technique for reducing parity bit-widths for check bit and syndrome...
- Patent number 7,962,837
- Issue date Jun 14, 2011
- United Memories, Inc.
- Oscar Frederick Jones, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short-circuit charge-sharing technique for integrated circuit devices
- Patent number 7,649,406
- Issue date Jan 19, 2010
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data inversion register technique for integrated circuit memory tes...
- Patent number 7,631,233
- Issue date Dec 8, 2009
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Switched capacitor charge sharing technique for integrated circuit...
- Patent number 7,609,570
- Issue date Oct 27, 2009
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized charge sharing for data bus skew applications
- Patent number 7,606,093
- Issue date Oct 20, 2009
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low skew clock distribution tree
- Patent number 7,586,355
- Issue date Sep 8, 2009
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple bus charge sharing
- Patent number 7,580,304
- Issue date Aug 25, 2009
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static random access memory (SRAM) compatible, high availability me...
- Patent number 7,506,100
- Issue date Mar 17, 2009
- United Memories, Inc.
- Douglas Blaine Butler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bus charge-sharing technique for integrated circuit devices
- Patent number 7,463,054
- Issue date Dec 9, 2008
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power-gating system and method for integrated circuit devices
- Patent number 7,372,765
- Issue date May 13, 2008
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed power-gating technique for integrated circuit devices in...
- Patent number 7,359,277
- Issue date Apr 15, 2008
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout area efficient, high speed, dynamic multi-input exclusive or...
- Patent number 7,298,171
- Issue date Nov 20, 2007
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier power-gating technique for integrated circuit memor...
- Patent number 7,248,522
- Issue date Jul 24, 2007
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Grant
Powergating method and apparatus
- Patent number 7,180,363
- Issue date Feb 20, 2007
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced gate delay multiplexed interface and output buffer circuit...
- Patent number 7,161,214
- Issue date Jan 9, 2007
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock signal initiated precharge technique for active memory subarr...
- Patent number 7,154,795
- Issue date Dec 26, 2006
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-addressed subarray precharge
- Patent number 7,151,711
- Issue date Dec 19, 2006
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual access DRAM
- Patent number 7,110,306
- Issue date Sep 19, 2006
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power sleep mode operation technique for dynamic random access...
- Patent number 7,099,234
- Issue date Aug 29, 2006
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Powergate control using boosted and negative voltages
- Patent number 7,053,692
- Issue date May 30, 2006
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual word line mode for DRAMs
- Patent number 7,002,874
- Issue date Feb 21, 2006
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Column read amplifier power-gating technique for integrated circuit...
- Patent number 6,990,029
- Issue date Jan 24, 2006
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-contiguous masked refresh for an integrated circuit memory
- Patent number 6,912,168
- Issue date Jun 28, 2005
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Bandgap reference circuit
- Patent number 6,815,941
- Issue date Nov 9, 2004
- United Memories, Inc.
- Douglas Blaine Butler
- G05 - CONTROLLING REGULATING
Information Patent Grant
Bitline reference voltage circuit
- Patent number 6,788,590
- Issue date Sep 7, 2004
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock controlled power-down state
- Patent number 6,788,122
- Issue date Sep 7, 2004
- United Memories, Inc.
- Oscar Frederick Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous input data path technique for increasing speed and red...
- Patent number 6,744,690
- Issue date Jun 1, 2004
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LINEAR PROGRESSION DELAY REGISTER
- Publication number 20160065193
- Publication date Mar 3, 2016
- United Memories, Inc.
- Jon Allan Faue
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUAL-COMPLEMENTARY INTEGRATING DUTY CYCLE DETECTOR WITH DEAD BAND N...
- Publication number 20150295564
- Publication date Oct 15, 2015
- United Memories, Inc.
- Oscar Frederick Jones
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CIRCUIT AND TECHNIQUE FOR REDUCING PARITY BIT-WIDTHS FOR CHECK BIT...
- Publication number 20110209033
- Publication date Aug 25, 2011
- United Memories, Inc.
- Oscar Frederick Jones, JR.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY ME...
- Publication number 20090106488
- Publication date Apr 23, 2009
- United Memories, Inc.
- Douglas Blaine Butler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INVERSION REGISTER TECHNIQUE FOR INTEGRATED CIRCUIT MEMORY TES...
- Publication number 20090094497
- Publication date Apr 9, 2009
- United Memories, Inc.
- Michael C. Parris
- G01 - MEASURING TESTING
Information Patent Application
TECHNIQUE FOR REDUCING PARITY BIT-WIDTHS FOR CHECK BIT AND SYNDROME...
- Publication number 20090077453
- Publication date Mar 19, 2009
- United Memories, Inc.
- Oscar Frederick Jones, JR.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EARLY WRITE WITH DATA MASKING TECHNIQUE FOR INTEGRATED CIRCUIT DYNA...
- Publication number 20090073786
- Publication date Mar 19, 2009
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
SHORT-CIRCUIT CHARGE-SHARING TECHNIQUE FOR INTEGRATED CIRCUIT DEVICES
- Publication number 20090072879
- Publication date Mar 19, 2009
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ERROR CORRECTION CODE (ECC) CIRCUIT TEST MODE
- Publication number 20090049350
- Publication date Feb 19, 2009
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
LOW SKEW CLOCK DISTRIBUTION TREE
- Publication number 20090015311
- Publication date Jan 15, 2009
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE BUS CHARGE SHARING
- Publication number 20080313379
- Publication date Dec 18, 2008
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZED CHARGE SHARING FOR DATA BUS SKEW APPLICATIONS
- Publication number 20080174340
- Publication date Jul 24, 2008
- United Memories, Inc.
- Michael C. Parris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SWITCHED CAPACITOR CHARGE SHARING TECHNIQUE FOR INTEGRATED CIRCUIT...
- Publication number 20080175074
- Publication date Jul 24, 2008
- United Memories, Inc.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for controlling the drive strength of output driv...
- Publication number 20070103124
- Publication date May 10, 2007
- United Memories, Inc.
- John D. Heightley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for improving the timing resolution of DLL controlled delay...
- Publication number 20070096787
- Publication date May 3, 2007
- United Memories, Inc.
- John D. Heightley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Layout area efficient, high speed, dynamic multi-input exclusive or...
- Publication number 20070008014
- Publication date Jan 11, 2007
- United Memories, Inc.
- Michael C. Parris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Self-addressed subarray precharge
- Publication number 20060187727
- Publication date Aug 24, 2006
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE
Information Patent Application
Power-gating system and method for integrated circuit devices
- Publication number 20050270074
- Publication date Dec 8, 2005
- United Memories, Inc.
- Kim C. Hardee
- G11 - INFORMATION STORAGE

Trademarklast 30 trademarks

Information Trademark
76493711 - UNITED MEMORIES
- Serial number 76493711
- Registration number 2850415
- Filing date Feb 28, 2003
- United Memories, Inc.
- 42 - Scientific and technological services and research and design relating thereto

United Memories, Inc.

Organization

Patents Grantslast 30 patents

Linear progression delay register

Linear progression delay register

Dual-complementary integrating duty cycle detector with dead band n...

Technique for reducing parity bit-widths for check bit and syndrome...

Short-circuit charge-sharing technique for integrated circuit devices

Data inversion register technique for integrated circuit memory tes...

Switched capacitor charge sharing technique for integrated circuit...

Optimized charge sharing for data bus skew applications

Low skew clock distribution tree

Multiple bus charge sharing

Static random access memory (SRAM) compatible, high availability me...

Data bus charge-sharing technique for integrated circuit devices

Power-gating system and method for integrated circuit devices

High speed power-gating technique for integrated circuit devices in...

Layout area efficient, high speed, dynamic multi-input exclusive or...

Sense amplifier power-gating technique for integrated circuit memor...

Powergating method and apparatus

Reduced gate delay multiplexed interface and output buffer circuit...

Clock signal initiated precharge technique for active memory subarr...

Self-addressed subarray precharge

Dual access DRAM

Low power sleep mode operation technique for dynamic random access...

Powergate control using boosted and negative voltages

Dual word line mode for DRAMs

Column read amplifier power-gating technique for integrated circuit...

Non-contiguous masked refresh for an integrated circuit memory

Bandgap reference circuit

Bitline reference voltage circuit

Clock controlled power-down state

Asynchronous input data path technique for increasing speed and red...

Patents Applicationslast 30 patents

LINEAR PROGRESSION DELAY REGISTER

DUAL-COMPLEMENTARY INTEGRATING DUTY CYCLE DETECTOR WITH DEAD BAND N...

CIRCUIT AND TECHNIQUE FOR REDUCING PARITY BIT-WIDTHS FOR CHECK BIT...

STATIC RANDOM ACCESS MEMORY (SRAM) COMPATIBLE, HIGH AVAILABILITY ME...

DATA INVERSION REGISTER TECHNIQUE FOR INTEGRATED CIRCUIT MEMORY TES...

TECHNIQUE FOR REDUCING PARITY BIT-WIDTHS FOR CHECK BIT AND SYNDROME...

EARLY WRITE WITH DATA MASKING TECHNIQUE FOR INTEGRATED CIRCUIT DYNA...

SHORT-CIRCUIT CHARGE-SHARING TECHNIQUE FOR INTEGRATED CIRCUIT DEVICES

ERROR CORRECTION CODE (ECC) CIRCUIT TEST MODE

LOW SKEW CLOCK DISTRIBUTION TREE

MULTIPLE BUS CHARGE SHARING

OPTIMIZED CHARGE SHARING FOR DATA BUS SKEW APPLICATIONS

SWITCHED CAPACITOR CHARGE SHARING TECHNIQUE FOR INTEGRATED CIRCUIT...

System and method for controlling the drive strength of output driv...

Method for improving the timing resolution of DLL controlled delay...

Layout area efficient, high speed, dynamic multi-input exclusive or...

Self-addressed subarray precharge

Power-gating system and method for integrated circuit devices

Trademarklast 30 trademarks

76493711 - UNITED MEMORIES