Alexander S. Podkolzin

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Impulse regular expression matching
- Patent number 9,177,251
- Issue date Nov 3, 2015
- Intel Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Majority-tabular post processing of quasi-cyclic low-density parity...
- Patent number 8,977,939
- Issue date Mar 10, 2015
- LSI Corporation
- Alexander S. Podkolzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Impulse regular expression matching
- Patent number 8,650,146
- Issue date Feb 11, 2014
- LSI Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for finding optimal unification substitution f...
- Patent number 7,003,739
- Issue date Feb 21, 2006
- LSI Logic Corporation
- Elyar E. Gasanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for optimizing the timing of integrated circuits
- Patent number 6,868,535
- Issue date Mar 15, 2005
- LSI Logic Corporation
- Alexander S. Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamic buffer and inverter tree optimization
- Patent number 6,681,373
- Issue date Jan 20, 2004
- LSI Logic Corporation
- Andrej A. Zolotykh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for quick search for identities applicable to...
- Patent number 6,637,011
- Issue date Oct 21, 2003
- LSI Logic Corporation
- Andrej A. Zolotykh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for timing driven resynthesis
- Patent number 6,564,361
- Issue date May 13, 2003
- LSI Logic Corporation
- Andrej A. Zolotykh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for local resynthesis of logic trees with mult...
- Patent number 6,543,032
- Issue date Apr 1, 2003
- LSI Logic Corporation
- Andrej A. Zolotykh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for optimal critical netlist area selection
- Patent number 6,532,582
- Issue date Mar 11, 2003
- LSI Logic Corporation
- Andrej A. Zolotykh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal architecture
- Patent number 6,407,434
- Issue date Jun 18, 2002
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable triangular shaped device having variable gain
- Patent number 6,312,980
- Issue date Nov 6, 2001
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 6,134,702
- Issue date Oct 17, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Triangular semiconductor or gate
- Patent number 6,097,073
- Issue date Aug 1, 2000
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture having diamond shaped or parallelogram shaped cells
- Patent number 5,973,376
- Issue date Oct 26, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 5,909,376
- Issue date Jun 1, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tri-directional interconnect architecture for SRAM
- Patent number 5,889,329
- Issue date Mar 30, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal sense cell architecture
- Patent number 5,872,380
- Issue date Feb 16, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Triangular semiconductor NAND gate
- Patent number 5,864,165
- Issue date Jan 26, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and method using monotonically im...
- Patent number 5,838,585
- Issue date Nov 17, 1998
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented method for leveling interconnect wiring densit...
- Patent number 5,835,378
- Issue date Nov 10, 1998
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Triangular semiconductor "AND" gate device
- Patent number 5,834,821
- Issue date Nov 10, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CAD for hexagonal architecture
- Patent number 5,822,214
- Issue date Oct 13, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistors having dynamically adjustable characteristics
- Patent number 5,811,863
- Issue date Sep 22, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Polydirectional non-orthoginal three layer interconnect architecture
- Patent number 5,808,330
- Issue date Sep 15, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal SRAM architecture
- Patent number 5,801,422
- Issue date Sep 1, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal architecture with triangular shaped cells
- Patent number 5,789,770
- Issue date Aug 4, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 5,784,287
- Issue date Jul 21, 1998
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal field programmable gate array architecture
- Patent number 5,777,360
- Issue date Jul 7, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal DRAM array
- Patent number 5,742,086
- Issue date Apr 21, 1998
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Majority-Tabular Post Processing of Quasi-Cyclic Low-Density Parity...
- Publication number 20140181624
- Publication date Jun 26, 2014
- LSI Corporation
- Alexander S. Podkolzin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
IMPULSE REGULAR EXPRESSION MATCHING
- Publication number 20140136465
- Publication date May 15, 2014
- LSI Corporation
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPULSE REGULAR EXPRESSION MATCHING
- Publication number 20110320397
- Publication date Dec 29, 2011
- Alexander Podkolzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for finding optimal unification substitution f...
- Publication number 20050114804
- Publication date May 26, 2005
- Elyar E. Gasanov
- G06 - COMPUTING CALCULATING COUNTING

Alexander S. Podkolzin

Person

Patents Grantslast 30 patents

Impulse regular expression matching

Majority-tabular post processing of quasi-cyclic low-density parity...

Impulse regular expression matching

Method and apparatus for finding optimal unification substitution f...

Method and apparatus for optimizing the timing of integrated circuits

Method and apparatus for dynamic buffer and inverter tree optimization

Method and apparatus for quick search for identities applicable to...

Method and apparatus for timing driven resynthesis

Method and apparatus for local resynthesis of logic trees with mult...

Method and apparatus for optimal critical netlist area selection

Hexagonal architecture

Programmable triangular shaped device having variable gain

Physical design automation system and process for designing integra...

Triangular semiconductor or gate

Architecture having diamond shaped or parallelogram shaped cells

Physical design automation system and process for designing integra...

Tri-directional interconnect architecture for SRAM

Hexagonal sense cell architecture

Triangular semiconductor NAND gate

Physical design automation system and method using monotonically im...

Computer implemented method for leveling interconnect wiring densit...

Triangular semiconductor "AND" gate device

CAD for hexagonal architecture

Transistors having dynamically adjustable characteristics

Polydirectional non-orthoginal three layer interconnect architecture

Hexagonal SRAM architecture

Hexagonal architecture with triangular shaped cells

Physical design automation system and process for designing integra...

Hexagonal field programmable gate array architecture

Hexagonal DRAM array

Patents Applicationslast 30 patents

Majority-Tabular Post Processing of Quasi-Cyclic Low-Density Parity...

IMPULSE REGULAR EXPRESSION MATCHING

IMPULSE REGULAR EXPRESSION MATCHING

Method and apparatus for finding optimal unification substitution f...