Alper Ilkbahar

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Volatile memory device employing a resistive memory element
- Patent number 9,953,697
- Issue date Apr 24, 2018
- SanDisk Technologies LLC
- Tanmay Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device incorporating segmented array line...
- Patent number 8,659,028
- Issue date Feb 25, 2014
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device incorporating segmented array line...
- Patent number 8,637,870
- Issue date Jan 28, 2014
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell that includes a carbon-based memory element and methods...
- Patent number 8,536,015
- Issue date Sep 17, 2013
- Sandisk 3D LLC
- Roy E. Scheuerlein
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Memory cell that includes a carbon-based memory element and methods...
- Patent number 8,110,476
- Issue date Feb 7, 2012
- Sandisk 3D LLC
- Roy E. Scheuerlein
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of making nonvolatile memory cell containing carbon resistiv...
- Patent number 8,048,474
- Issue date Nov 1, 2011
- Sandisk 3D LLC
- Tanmay Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for improving yield in semiconductor devices b...
- Patent number 7,545,689
- Issue date Jun 9, 2009
- Sandisk 3D LLC
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory array structure incorporating series-connected...
- Patent number 7,505,321
- Issue date Mar 17, 2009
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating capacitance boosting of channel reg...
- Patent number 7,433,233
- Issue date Oct 7, 2008
- Sandisk 3D LLC
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
System architecture and method for three-dimensional memory
- Patent number 7,383,476
- Issue date Jun 3, 2008
- Sandisk 3D LLC
- Matthew P. Crowley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for improving yield in semiconductor devices b...
- Patent number 7,277,336
- Issue date Oct 2, 2007
- Sandisk 3D LLC
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating capacitance boosting of channel reg...
- Patent number 7,233,522
- Issue date Jun 19, 2007
- Sandisk 3D LLC
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device incorporating segmented bit line me...
- Patent number 7,233,024
- Issue date Jun 19, 2007
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for redundancy/self-repair
- Patent number 7,219,271
- Issue date May 15, 2007
- Sandisk 3D LLC
- Bendik Kleveland
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with localized charge storage dielectric and m...
- Patent number 7,132,335
- Issue date Nov 7, 2006
- Sandisk 3D LLC
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND memory array incorporating multiple write pulse programming of...
- Patent number 7,023,739
- Issue date Apr 4, 2006
- Matrix Semiconductor, Inc.
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for fabricating programmable memory array structures incorpo...
- Patent number 7,005,350
- Issue date Feb 28, 2006
- Matrix Semiconductor, Inc.
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant memory structure using bad bit pointers
- Patent number 6,996,017
- Issue date Feb 7, 2006
- Matrix Semiconductor, Inc.
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
High density 3d rail stack arrays and method of making
- Patent number 6,940,109
- Issue date Sep 6, 2005
- Matrix Semiconductor, Inc.
- Kedar Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and method for storing bits in non-adjacent storage l...
- Patent number 6,928,590
- Issue date Aug 9, 2005
- Matrix Semiconductor, Inc.
- Alper Ilkbahar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangements for self-measurement of I/O timing
- Patent number 6,898,741
- Issue date May 24, 2005
- Intel Corporation
- Harry Muljono
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundant memory structure using bad bit pointers
- Patent number 6,868,022
- Issue date Mar 15, 2005
- Matrix Semiconductor, Inc.
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with localized charge storage dielectric and m...
- Patent number 6,849,905
- Issue date Feb 1, 2005
- Matrix Semiconductor, Inc.
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Grant
Array containing charge storage and dummy transistors and method of...
- Patent number 6,807,119
- Issue date Oct 19, 2004
- Matrix Semiconductor, Inc.
- Luca Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated systems using vertically-stacked three-dimensional memor...
- Patent number 6,765,813
- Issue date Jul 20, 2004
- Matrix Semiconductor, Inc.
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
High density 3D rail stack arrays
- Patent number 6,737,675
- Issue date May 18, 2004
- Matrix Semiconductor, Inc.
- Kedar Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus to structurally detect random defects that imp...
- Patent number 6,629,274
- Issue date Sep 30, 2003
- Intel Corporation
- Mike Tripp
- G11 - INFORMATION STORAGE
Information Patent Grant
System for protecting strobe glitches by separating a strobe signal...
- Patent number 6,622,256
- Issue date Sep 16, 2003
- Intel Corporation
- Sanjay Dabral
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device and method for dynamic bit inversion
- Patent number 6,563,745
- Issue date May 13, 2003
- Matrix Semiconductor, Inc.
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for electro-static discharge protection
- Patent number 6,545,520
- Issue date Apr 8, 2003
- Intel Corporation
- Timothy J. Maloney
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
VOLATILE MEMORY DEVICE EMPLOYING A RESISTIVE MEMORY ELEMENT
- Publication number 20170309324
- Publication date Oct 26, 2017
- SanDisk Technologies LLC
- Tanmay KUMAR
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS...
- Publication number 20120119178
- Publication date May 17, 2012
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...
- Publication number 20120106253
- Publication date May 3, 2012
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
CARBON-BASED RESISTIVITY-SWITCHING MATERIALS AND METHODS OF FORMING...
- Publication number 20100006812
- Publication date Jan 14, 2010
- SanDisk 3D LLC
- Huiwen Xu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS...
- Publication number 20090256132
- Publication date Oct 15, 2009
- SanDisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Method of making nonvolatile memory cell containing carbon resistiv...
- Publication number 20090258135
- Publication date Oct 15, 2009
- SANDISK 3D LLC
- Tanmay Kumar
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for improving yield in semiconductor devices b...
- Publication number 20070291563
- Publication date Dec 20, 2007
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...
- Publication number 20070263423
- Publication date Nov 15, 2007
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REG...
- Publication number 20070242511
- Publication date Oct 18, 2007
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for improving yield in semiconductor devices b...
- Publication number 20060140026
- Publication date Jun 29, 2006
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Application
Method of programming a monolithic three-dimensional memory
- Publication number 20060067127
- Publication date Mar 30, 2006
- MATRIX SEMICONDUCTOR, INC.
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
Nand memory array incorporating multiple series selection devices a...
- Publication number 20050128807
- Publication date Jun 16, 2005
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
NAND memory array incorporating multiple write pulse programming of...
- Publication number 20050122780
- Publication date Jun 9, 2005
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with localized charge storage dielectric and m...
- Publication number 20050079675
- Publication date Apr 14, 2005
- MATRIX SEMICONDUCTOR, INC.
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Application
Redundant memory structure using bad bit pointers
- Publication number 20050044459
- Publication date Feb 24, 2005
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
System architecture and method for three-dimensional memory
- Publication number 20040250183
- Publication date Dec 9, 2004
- Matthew P. Crowley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redundant memory structure using bad bit pointers
- Publication number 20040190357
- Publication date Sep 30, 2004
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Three-dimensional memory device incorporating segmented bit line me...
- Publication number 20040188714
- Publication date Sep 30, 2004
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
High density 3d rail stack arrays and method of making
- Publication number 20040159860
- Publication date Aug 19, 2004
- MATRIX SEMICONDUCTOR, INC.
- Kedar Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND memory array incorporating capacitance boosting of channel reg...
- Publication number 20040145024
- Publication date Jul 29, 2004
- En-Hsing Chen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPO...
- Publication number 20040124466
- Publication date Jul 1, 2004
- Andrew J. Walker
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable memory array structure incorporating series-connected...
- Publication number 20040125629
- Publication date Jul 1, 2004
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with localized charge storage dielectric and m...
- Publication number 20040119122
- Publication date Jun 24, 2004
- Alper Ilkbahar
- G11 - INFORMATION STORAGE
Information Patent Application
Array containing charge storage and dummy transistors and method of...
- Publication number 20040120186
- Publication date Jun 24, 2004
- Luca Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
High density 3D rail stack arrays and method of making
- Publication number 20040000679
- Publication date Jan 1, 2004
- MATRIX SEMICONDUCTOR, INC.
- Kedar Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Arrangements for self-measurement of I/O timing
- Publication number 20030229828
- Publication date Dec 11, 2003
- Harry Muljono
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory device and method for storing bits in non-adjacent storage l...
- Publication number 20030115514
- Publication date Jun 19, 2003
- Alper Ilkbahar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory device and method for redundancy/self-repair
- Publication number 20030115518
- Publication date Jun 19, 2003
- Bendik Kleveland
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated systems using vertically-stacked three-dimensional memor...
- Publication number 20020163834
- Publication date Nov 7, 2002
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for electro-static discharge protection
- Publication number 20020140489
- Publication date Oct 3, 2002
- Timothy J. Maloney
- H01 - BASIC ELECTRIC ELEMENTS

Alper Ilkbahar

Person

Patents Grantslast 30 patents

Volatile memory device employing a resistive memory element

Three-dimensional memory device incorporating segmented array line...

Three-dimensional memory device incorporating segmented array line...

Memory cell that includes a carbon-based memory element and methods...

Memory cell that includes a carbon-based memory element and methods...

Method of making nonvolatile memory cell containing carbon resistiv...

Method and apparatus for improving yield in semiconductor devices b...

Programmable memory array structure incorporating series-connected...

NAND memory array incorporating capacitance boosting of channel reg...

System architecture and method for three-dimensional memory

Method and apparatus for improving yield in semiconductor devices b...

NAND memory array incorporating capacitance boosting of channel reg...

Three-dimensional memory device incorporating segmented bit line me...

Memory device and method for redundancy/self-repair

Semiconductor device with localized charge storage dielectric and m...

NAND memory array incorporating multiple write pulse programming of...

Method for fabricating programmable memory array structures incorpo...

Redundant memory structure using bad bit pointers

High density 3d rail stack arrays and method of making

Memory device and method for storing bits in non-adjacent storage l...

Arrangements for self-measurement of I/O timing

Redundant memory structure using bad bit pointers

Semiconductor device with localized charge storage dielectric and m...

Array containing charge storage and dummy transistors and method of...

Integrated systems using vertically-stacked three-dimensional memor...

High density 3D rail stack arrays

Method and apparatus to structurally detect random defects that imp...

System for protecting strobe glitches by separating a strobe signal...

Memory device and method for dynamic bit inversion

Method and apparatus for electro-static discharge protection

Patents Applicationslast 30 patents

VOLATILE MEMORY DEVICE EMPLOYING A RESISTIVE MEMORY ELEMENT

MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS...

THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...

CARBON-BASED RESISTIVITY-SWITCHING MATERIALS AND METHODS OF FORMING...

MEMORY CELL THAT INCLUDES A CARBON-BASED MEMORY ELEMENT AND METHODS...

Method of making nonvolatile memory cell containing carbon resistiv...

Method and apparatus for improving yield in semiconductor devices b...

THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE...

NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REG...

Method and apparatus for improving yield in semiconductor devices b...

Method of programming a monolithic three-dimensional memory

Nand memory array incorporating multiple series selection devices a...

NAND memory array incorporating multiple write pulse programming of...

Semiconductor device with localized charge storage dielectric and m...

Redundant memory structure using bad bit pointers

System architecture and method for three-dimensional memory

Redundant memory structure using bad bit pointers

Three-dimensional memory device incorporating segmented bit line me...

High density 3d rail stack arrays and method of making

NAND memory array incorporating capacitance boosting of channel reg...

METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPO...

Programmable memory array structure incorporating series-connected...

Semiconductor device with localized charge storage dielectric and m...

Array containing charge storage and dummy transistors and method of...

High density 3D rail stack arrays and method of making

Arrangements for self-measurement of I/O timing

Memory device and method for storing bits in non-adjacent storage l...

Memory device and method for redundancy/self-repair

Integrated systems using vertically-stacked three-dimensional memor...

Method and apparatus for electro-static discharge protection