Amol Kalburge

Person

Irvine, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bipolar transistor fabricated in a biCMOS process
- Patent number 7,994,611
- Issue date Aug 9, 2011
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for integrating nanotube devices with CMOS for RF/analog SoC...
- Patent number 7,871,851
- Issue date Jan 18, 2011
- RF Nano
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for integrating SiGe NPN and vertical PNP devices
- Patent number 7,863,148
- Issue date Jan 4, 2011
- Newport Fab, LLC
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for determining anisotropy of 1-D conductor or semiconductor...
- Patent number 7,816,906
- Issue date Oct 19, 2010
- RF Nano Corporation
- Amol M. Kalburge
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Deep trench isolation and method for forming same
- Patent number 7,772,673
- Issue date Aug 10, 2010
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of SiGe NPN and vertical PNP devices on a substrate
- Patent number 7,541,231
- Issue date Jun 2, 2009
- Newport Fab, LLC
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating a self-aligned bipolar transistor having increased manu...
- Patent number 7,291,536
- Issue date Nov 6, 2007
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor without sp...
- Patent number 7,282,418
- Issue date Oct 16, 2007
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned bipolar transistor having increased manufacturability
- Patent number 7,064,415
- Issue date Jun 20, 2006
- Newport Fab. LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor
- Patent number 7,041,564
- Issue date May 9, 2006
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor having rec...
- Patent number 7,033,898
- Issue date Apr 25, 2006
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming deep trench isolation and related structure
- Patent number 7,015,115
- Issue date Mar 21, 2006
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep trench isolation region with reduced-size cavities in overlyin...
- Patent number 6,995,449
- Issue date Feb 7, 2006
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS transistor spacers formed in a BiCMOS process
- Patent number 6,992,338
- Issue date Jan 31, 2006
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor having inc...
- Patent number 6,979,626
- Issue date Dec 27, 2005
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for integrating SiGe NPN and vertical PNP devices on a subst...
- Patent number 6,933,202
- Issue date Aug 23, 2005
- Newport Fab, LLC
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned bipolar transistor having recessed spacers and method...
- Patent number 6,894,328
- Issue date May 17, 2005
- Newport Fab, LLC
- Amol Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned bipolar transistor without spacers and method for fabr...
- Patent number 6,867,440
- Issue date Mar 15, 2005
- Newport Fab, LLC
- Amol M Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming CMOS transistor spacers in a BiCMOS process
- Patent number 6,830,967
- Issue date Dec 14, 2004
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor with plana...
- Patent number 6,809,353
- Issue date Oct 26, 2004
- Newport Fab, LLC
- Amol M Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a bipolar transistor in a BiCMOS process and...
- Patent number 6,797,580
- Issue date Sep 28, 2004
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligned bipolar transistor and relate...
- Patent number 6,784,467
- Issue date Aug 31, 2004
- Newport Fab, LLC
- Amol M Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for hard mask removal for deep trench isolation and related...
- Patent number 6,770,541
- Issue date Aug 3, 2004
- Newport Fab, LLC
- Kevin Q. Yin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for controlling an emitter window opening in an HBT and rela...
- Patent number 6,764,913
- Issue date Jul 20, 2004
- Newport Fab, LLC
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
HBT having a controlled emitter window opening
- Patent number 6,765,243
- Issue date Jul 20, 2004
- Newport Fab, LLC
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for controlling an emitter window opening in an HBT and rela...
- Patent number 6,586,307
- Issue date Jul 1, 2003
- Newport Fab, LLC
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for integrating SIGE NPN and Vertical PNP Devices
- Publication number 20090203183
- Publication date Aug 13, 2009
- Newport Fab, LLC dba Jazz Semiconductor.
- Paul D. Hurwitz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Nanotube and CMOS Devices For System-On-Chip (SoC) Appli...
- Publication number 20090114903
- Publication date May 7, 2009
- Amol M. Kalburge
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for Determining Anisotropy of 1-D Conductor or Semiconductor...
- Publication number 20090058395
- Publication date Mar 5, 2009
- Amol M. Kalburge
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for Integrating Nanotube Devices with CMOS for RF/Analog SoC...
- Publication number 20080290418
- Publication date Nov 27, 2008
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS Compatible Method of Forming Source/Drain Contacts for Self-Al...
- Publication number 20080293228
- Publication date Nov 27, 2008
- Amol M. Kalburge
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for fabricating a self-aligned bipolar transistor with plana...
- Publication number 20040140530
- Publication date Jul 22, 2004
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a self-aligned bipolar transistor having inc...
- Publication number 20040135179
- Publication date Jul 15, 2004
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned bipolar transistor having recessed spacers and method...
- Publication number 20040124444
- Publication date Jul 1, 2004
- Amol M. Kalburge
- H01 - BASIC ELECTRIC ELEMENTS

Amol Kalburge

Person

Patents Grantslast 30 patents

Bipolar transistor fabricated in a biCMOS process

Method for integrating nanotube devices with CMOS for RF/analog SoC...

Method for integrating SiGe NPN and vertical PNP devices

Method for determining anisotropy of 1-D conductor or semiconductor...

Deep trench isolation and method for forming same

Integration of SiGe NPN and vertical PNP devices on a substrate

Fabricating a self-aligned bipolar transistor having increased manu...

Method for fabricating a self-aligned bipolar transistor without sp...

Self-aligned bipolar transistor having increased manufacturability

Method for fabricating a self-aligned bipolar transistor

Method for fabricating a self-aligned bipolar transistor having rec...

Method for forming deep trench isolation and related structure

Deep trench isolation region with reduced-size cavities in overlyin...

CMOS transistor spacers formed in a BiCMOS process

Method for fabricating a self-aligned bipolar transistor having inc...

Method for integrating SiGe NPN and vertical PNP devices on a subst...

Self-aligned bipolar transistor having recessed spacers and method...

Self-aligned bipolar transistor without spacers and method for fabr...

Method for forming CMOS transistor spacers in a BiCMOS process

Method for fabricating a self-aligned bipolar transistor with plana...

Method for fabricating a bipolar transistor in a BiCMOS process and...

Method for fabricating a self-aligned bipolar transistor and relate...

Method for hard mask removal for deep trench isolation and related...

Method for controlling an emitter window opening in an HBT and rela...

HBT having a controlled emitter window opening

Method for controlling an emitter window opening in an HBT and rela...

Patents Applicationslast 30 patents

Method for integrating SIGE NPN and Vertical PNP Devices

Integrated Nanotube and CMOS Devices For System-On-Chip (SoC) Appli...

Method for Determining Anisotropy of 1-D Conductor or Semiconductor...

Method for Integrating Nanotube Devices with CMOS for RF/Analog SoC...

CMOS Compatible Method of Forming Source/Drain Contacts for Self-Al...

Method for fabricating a self-aligned bipolar transistor with plana...

Method for fabricating a self-aligned bipolar transistor having inc...

Self-aligned bipolar transistor having recessed spacers and method...