An L. Steegen

Person

Stamford, CT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and structure for forming strained SI for CMOS devices
- Patent number 7,928,443
- Issue date Apr 19, 2011
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective silicon-on-insulator isolation structure and method
- Patent number 7,923,786
- Issue date Apr 12, 2011
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for forming strained Si for CMOS devices
- Patent number 7,700,951
- Issue date Apr 20, 2010
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS silicide metal gate integration
- Patent number 7,655,557
- Issue date Feb 2, 2010
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for forming strained SI for CMOS devices
- Patent number 7,550,338
- Issue date Jun 23, 2009
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for forming strained SI for CMOS devices
- Patent number 7,429,752
- Issue date Sep 30, 2008
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS silicide metal gate integration
- Patent number 7,411,227
- Issue date Aug 12, 2008
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making strained semiconductor transistors having lattice-...
- Patent number 7,396,714
- Issue date Jul 8, 2008
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective silicon-on-insulator isolation structure and method
- Patent number 7,326,983
- Issue date Feb 5, 2008
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process options of forming silicided metal gates for advanced CMOS...
- Patent number 7,326,610
- Issue date Feb 5, 2008
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making strained semiconductor transistors having lattice-...
- Patent number 7,291,528
- Issue date Nov 6, 2007
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for forming strained Si for CMOS devices
- Patent number 7,129,126
- Issue date Oct 31, 2006
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming self-aligned dual salicide in CMOS technologies
- Patent number 7,112,481
- Issue date Sep 26, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench sidewall passivation for lateral RIE in a selective silicon-...
- Patent number 7,081,397
- Issue date Jul 25, 2006
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming self-aligned dual salicide in CMOS technologies
- Patent number 7,067,368
- Issue date Jun 27, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming self-aligned dual salicide in CMOS technologies
- Patent number 7,064,025
- Issue date Jun 20, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS silicide metal gate integration
- Patent number 7,056,782
- Issue date Jun 6, 2006
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FET gate structure with metal gate electrode and silicide contact
- Patent number 7,056,794
- Issue date Jun 6, 2006
- International Business Machines Corporation
- Victor Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process options of forming silicided metal gates for advanced CMOS...
- Patent number 7,029,966
- Issue date Apr 18, 2006
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming FET silicide gate structures incorporating inner...
- Patent number 6,974,736
- Issue date Dec 13, 2005
- International Business Machines Corporation
- Victor Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective silicon-on-insulator isolation structure and method
- Patent number 6,936,522
- Issue date Aug 30, 2005
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for integration of silicide contacts and silicide gate metals
- Patent number 6,927,117
- Issue date Aug 9, 2005
- International Business Machines Corporation
- Cyril Cabral, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming metal replacement gate of high performance
- Patent number 6,921,711
- Issue date Jul 26, 2005
- International Business Machines Corporation
- Cyril Cabral, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method of making strained semiconductor CMOS transist...
- Patent number 6,891,192
- Issue date May 10, 2005
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dense SRAM cells with selective SOI
- Patent number 6,876,040
- Issue date Apr 5, 2005
- International Business Machines Corporation
- Hsingjen Wann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicide proximity structures for CMOS device performance improvements
- Patent number 6,869,866
- Issue date Mar 22, 2005
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES
- Publication number 20100109048
- Publication date May 6, 2010
- International Business Machines Corporation
- An L. STEEGEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES
- Publication number 20080283824
- Publication date Nov 20, 2008
- International Business Machines Corporation,
- An L. STEEGEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS SILICIDE METAL GATE INTEGRATION
- Publication number 20080254622
- Publication date Oct 16, 2008
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD
- Publication number 20080029818
- Publication date Feb 7, 2008
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES
- Publication number 20080003735
- Publication date Jan 3, 2008
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making strained semiconductor transistors having lattice-...
- Publication number 20070249114
- Publication date Oct 25, 2007
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS silicide metal gate integration
- Publication number 20060189061
- Publication date Aug 24, 2006
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming self-aligned dual salicide in CMOS technologies
- Publication number 20060121664
- Publication date Jun 8, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SELF-ALIGNED DUAL SALICIDE IN CMOS TECHNOLOGIES
- Publication number 20060121662
- Publication date Jun 8, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SELF-ALIGNED DUAL SALICIDE IN CMOS TECHNOLOGIES
- Publication number 20060121665
- Publication date Jun 8, 2006
- International Business Machines Corporation
- Sunfei Fang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process options of forming silicided metal gates for advanced CMOS...
- Publication number 20060105515
- Publication date May 18, 2006
- IBM CORPORATION
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench sidewall passivation for lateral rie in a selective silicon-...
- Publication number 20060046428
- Publication date Mar 2, 2006
- International Business Machines Corporation
- Christopher V. Baiocco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS silicide metal gate integration
- Publication number 20050186747
- Publication date Aug 25, 2005
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective silicon-on-insulator isolation structure and method
- Publication number 20050164468
- Publication date Jul 28, 2005
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making strained semiconductor transistors having lattice-...
- Publication number 20050158931
- Publication date Jul 21, 2005
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT
- Publication number 20050153530
- Publication date Jul 14, 2005
- International Business Machines Corporation
- Victor Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING FET SILICIDE GATE STRUCTURES INCORPORATING INNER...
- Publication number 20050153494
- Publication date Jul 14, 2005
- International Business Machines Corporation
- Victor Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for integration of silicide contacts and silicide gate metals
- Publication number 20050118757
- Publication date Jun 2, 2005
- International Business Machines Corporation
- Cyril Cabral
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES
- Publication number 20050093076
- Publication date May 5, 2005
- International Business Machines Corporation
- An L. Steegen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS OPTIONS OF FORMING SILICIDED METAL GATES FOR ADVANCED CMOS...
- Publication number 20050064690
- Publication date Mar 24, 2005
- International Business Machines Corporation
- Ricky S. Amos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICIDE PROXIMITY STRUCTURES FOR CMOS DEVICE PERFORMANCE IMPROVEMENTS
- Publication number 20050064687
- Publication date Mar 24, 2005
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD FOR METAL REPLACEMENT GATE OF HIGH PERFORMANCE
- Publication number 20050051854
- Publication date Mar 10, 2005
- International Business Machines Corporation
- Cyril Cabral
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD OF MAKING STRAINED SEMICONDUCTOR CMOS TRANSIST...
- Publication number 20050029601
- Publication date Feb 10, 2005
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS

An L. Steegen

Person

Patents Grantslast 30 patents

Method and structure for forming strained SI for CMOS devices

Selective silicon-on-insulator isolation structure and method

Method and structure for forming strained Si for CMOS devices

CMOS silicide metal gate integration

Method and structure for forming strained SI for CMOS devices

Method and structure for forming strained SI for CMOS devices

CMOS silicide metal gate integration

Method of making strained semiconductor transistors having lattice-...

Selective silicon-on-insulator isolation structure and method

Process options of forming silicided metal gates for advanced CMOS...

Method of making strained semiconductor transistors having lattice-...

Method and structure for forming strained Si for CMOS devices

Method for forming self-aligned dual salicide in CMOS technologies

Trench sidewall passivation for lateral RIE in a selective silicon-...

Method for forming self-aligned dual salicide in CMOS technologies

Method for forming self-aligned dual salicide in CMOS technologies

CMOS silicide metal gate integration

FET gate structure with metal gate electrode and silicide contact

Process options of forming silicided metal gates for advanced CMOS...

Method of forming FET silicide gate structures incorporating inner...

Selective silicon-on-insulator isolation structure and method

Method for integration of silicide contacts and silicide gate metals

Method for forming metal replacement gate of high performance

Structure and method of making strained semiconductor CMOS transist...

Dense SRAM cells with selective SOI

Silicide proximity structures for CMOS device performance improvements

Patents Applicationslast 30 patents

METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

CMOS SILICIDE METAL GATE INTEGRATION

SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD

METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

Method of making strained semiconductor transistors having lattice-...

CMOS silicide metal gate integration

Method for forming self-aligned dual salicide in CMOS technologies

METHOD FOR FORMING SELF-ALIGNED DUAL SALICIDE IN CMOS TECHNOLOGIES

METHOD FOR FORMING SELF-ALIGNED DUAL SALICIDE IN CMOS TECHNOLOGIES

Process options of forming silicided metal gates for advanced CMOS...

Trench sidewall passivation for lateral rie in a selective silicon-...

CMOS silicide metal gate integration

Selective silicon-on-insulator isolation structure and method

Method of making strained semiconductor transistors having lattice-...

FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT

METHOD OF FORMING FET SILICIDE GATE STRUCTURES INCORPORATING INNER...

Method for integration of silicide contacts and silicide gate metals

METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES

PROCESS OPTIONS OF FORMING SILICIDED METAL GATES FOR ADVANCED CMOS...

SILICIDE PROXIMITY STRUCTURES FOR CMOS DEVICE PERFORMANCE IMPROVEMENTS

STRUCTURE AND METHOD FOR METAL REPLACEMENT GATE OF HIGH PERFORMANCE

STRUCTURE AND METHOD OF MAKING STRAINED SEMICONDUCTOR CMOS TRANSIST...